Presentation 2015-06-12
Design Study of FDTD/FIT Dataflow Machine for Wider Applications
Hideki Kawaguchi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) For a purpose of practical use of microwave simulation technologies in industry applications, this paper presents a method of a dedicated computer for the microwave simulations as a kind of portable High Performance Computing (HPC) technology. In particular, a dataflow architecture is adopted in the dedicated computer to effectively achieve high performance computation of microwave simulation by invoking properties of parallel processing in the FDTD method. In this paper, it is mainly discussed how to construct the FDTD dedicated circuit to simulate various kinds of numerical models by the same hardware.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) high-performance computing / microwave simulation / Finite-Difference Time Domain (FDTD) method / dedicated computer / Field Programmable Gate Array (FPGA)
Paper # EMT2015-5
Date of Issue 2015-06-05 (EMT)

Conference Information
Committee EMT / IEE-EMT
Conference Date 2015/6/12(1days)
Place (in Japanese) (See Japanese page)
Place (in English) meeting room (1-5) of IEEJ
Topics (in Japanese) (See Japanese page)
Topics (in English) Electromagnetic Theory, etc.
Chair Motoyuki Sato(Tohoku Univ.) / Masahiro Tanaka(Gifu Univ.)
Vice Chair Akira Hirose(Univ. of Tokyo)
Secretary Akira Hirose(Niigata Univ.) / (Mitsubishi Electric)
Assistant Kazunori Takahashi(Tohoku Univ.) / Yoshihiro Naka(Kyushu Univ. of Health and Welfare)

Paper Information
Registration To Technical Committee on Electromagnetic Theory / Technical Meeting on Electromagnetic Theory
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design Study of FDTD/FIT Dataflow Machine for Wider Applications
Sub Title (in English)
Keyword(1) high-performance computing
Keyword(2) microwave simulation
Keyword(3) Finite-Difference Time Domain (FDTD) method
Keyword(4) dedicated computer
Keyword(5) Field Programmable Gate Array (FPGA)
1st Author's Name Hideki Kawaguchi
1st Author's Affiliation Muroran Institute of Technology(Muroran IT)
Date 2015-06-12
Paper # EMT2015-5
Volume (vol) vol.115
Number (no) EMT-83
Page pp.pp.25-30(EMT),
#Pages 6
Date of Issue 2015-06-05 (EMT)