Presentation 2015-05-28
Rapid Recovery Technique from Soft Error of FPGAs in Information and Communication Apparatus
Kenichi Shimbo, Tadanobu Toba, Takumi Uezono, Hidefumi Ibe,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) As the amount of data traffic through the communication infrastructure is increasing, a development of high-speed information and communication apparatus enabling to handle large volumes of data is required. An information and communication apparatus has a lot of programmable devices such as FPGAs because of their design flexibility. On the other hand, use of high-speed and well-integrated FPGA faces a growing risk of malfunction caused by terrestrial-neutron induced soft errors. In a conventional method for mitigating soft errors, configuration memories (CRAM) which is the weakest circuit in FPGAs is scanned and corrected by circuit IP provided by FPGA vendors. However, multi-die FPGAs have large volume of CRAMs resulting long time to recover soft errors. In fact, it is difficult to guarantee a continuity of services while recovering system operation. This time, we developed a novel circuit IP, called CRAM-control engine, which recovers soft errors in short time by controlling CRAM areas to be scanned and scan-sequence. In this report, we introduce an overview of our developed IP and its features, and report confirmation results of the efficiency of our IP by neutron-irradiation tests.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Neutron / Soft-error / FPGA / CRAM
Paper # RCC2015-9,MICT2015-9
Date of Issue 2015-05-21 (RCC, MICT)

Conference Information
Committee RCC / MICT
Conference Date 2015/5/28(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Kikai-Shinko-Kaikan Bldg
Topics (in Japanese) (See Japanese page)
Topics (in English) Reliable Communication and Control, Healthcare and Medical Information Communication Technologies, etc.
Chair Masaaki Katayama(Nagoya Univ.) / Ryuji Kohno(Yokohama National Univ.)
Vice Chair Shinsuke Hara(Osaka City Univ.) / Ryu Miura(NICT) / Jianqing Wang(Nagoya Inst. of Tech.) / Masaru Sugimachi(National Cerebral and Cardiovascular Center)
Secretary Shinsuke Hara(Hokkaido Univ.) / Ryu Miura(Kyoto Univ.) / Jianqing Wang(Tokyo Inst. of Tech.) / Masaru Sugimachi(NICT)
Assistant Koji Ishii(Kagawa Univ.) / Kentaro Kobayashi(Nagoya Univ.) / Daisuke Anzai(Nagoya Inst. of Tech.) / Kohei Ohno(Meiji Univ.) / Keisuke Shima(Yokohama National Univ.)

Paper Information
Registration To Technical Committee on Reliable Communication and Control / Technical Committee on Healthcare and Medical Information Communication Technology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Rapid Recovery Technique from Soft Error of FPGAs in Information and Communication Apparatus
Sub Title (in English)
Keyword(1) Neutron
Keyword(2) Soft-error
Keyword(3) FPGA
Keyword(4) CRAM
1st Author's Name Kenichi Shimbo
1st Author's Affiliation Hitachi,Ltd(Hitachi)
2nd Author's Name Tadanobu Toba
2nd Author's Affiliation Hitachi,Ltd(Hitachi)
3rd Author's Name Takumi Uezono
3rd Author's Affiliation Hitachi,Ltd(Hitachi)
4th Author's Name Hidefumi Ibe
4th Author's Affiliation Hitachi,Ltd(Hitachi)
Date 2015-05-28
Paper # RCC2015-9,MICT2015-9
Volume (vol) vol.115
Number (no) RCC-58,MICT-59
Page pp.pp.37-42(RCC), pp.37-42(MICT),
#Pages 6
Date of Issue 2015-05-21 (RCC, MICT)