Presentation 2015-04-17
A study of processor architecture suited for intelligent sensing system
Hiroki Hihara, Akira Iwasaki, Masanori Hashimoto, Hiroyuki Ochi, Yukio Mitsuyama, Hidetoshi Onodera, Hiroyuki Kanbara, Kazutoshi Wakabayashi, Takashi Takenaka, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Sensor nodes are now important elements for the system of social infrastructure, and thus intelligent processing capabilities are required on the sensors. Optimization, selection, compression of data are essential and intellectual process in advance the sensors send the large volume of raw data to cloud systems. An embedded automaton model is proposed in order to clarify the requirement specification of processor architecture suitable for empowering the intelligent capability of sensors. The requirement specification derived from the model has been found to be consistent with behavioral synthesis and a dynamically reconfigurable very large scale integration (VLSI) with dependability.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Dependability / Behavioral synthesis / Embedded system / Internet of Things (IoT) / Intellectual sensor / Automaton
Paper # CPSY2015-8,DC2015-8
Date of Issue 2015-04-10 (CPSY, DC)

Conference Information
Committee DC / CPSY
Conference Date 2015/4/17(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Nobuyasu Kanekawa(Hitachi) / Tsutomu Yoshinaga(Univ. of Electro-Comm.)
Vice Chair Michiko Inoue(NAIST) / Akira Asato(Fujitsu) / Yasuhiko Nakajima(NAIST)
Secretary Michiko Inoue(RTRI) / Akira Asato(Osaka Univ.) / Yasuhiko Nakajima(Hiroshima Univ.)
Assistant / Hiroaki Inoue(NEC) / Takeshi Ohkawa(Utsunomiya Univ.)

Paper Information
Registration To Technical Committee on Dependable Computing / Technical Committee on Computer Systems
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A study of processor architecture suited for intelligent sensing system
Sub Title (in English)
Keyword(1) Dependability
Keyword(2) Behavioral synthesis
Keyword(3) Embedded system
Keyword(4) Internet of Things (IoT)
Keyword(5) Intellectual sensor
Keyword(6) Automaton
1st Author's Name Hiroki Hihara
1st Author's Affiliation The University of Tokyo(Univ. of Tokyo)
2nd Author's Name Akira Iwasaki
2nd Author's Affiliation The University of Tokyo(Univ. of Tokyo)
3rd Author's Name Masanori Hashimoto
3rd Author's Affiliation Osaka University/JST CREST(Osaka Univ./JST CREST)
4th Author's Name Hiroyuki Ochi
4th Author's Affiliation Ritsumeikan University/JST CREST(Rits/JST CREST)
5th Author's Name Yukio Mitsuyama
5th Author's Affiliation Kochi University of Technology/JST CREST(KUT/JST CREST)
6th Author's Name Hidetoshi Onodera
6th Author's Affiliation Kyoto University/JST CREST(Kyoto Univ./JST CREST)
7th Author's Name Hiroyuki Kanbara
7th Author's Affiliation Advanced Scientific Technology & Management Research Institute of KYOTO/JST CREST(ASTEM/JST CREST)
8th Author's Name Kazutoshi Wakabayashi
8th Author's Affiliation NEC Corporation/JST CREST(NEC/JST CREST)
9th Author's Name Takashi Takenaka
9th Author's Affiliation NEC Corporation/JST CREST(NEC/JST CREST)
10th Author's Name Takashi Takenaka
10th Author's Affiliation NEC Corporation/JST CREST(NEC/JST CREST)
11th Author's Name Hiromitsu Hada
11th Author's Affiliation NEC Corporation/JST CREST(NEC/JST CREST)
12th Author's Name Munehiro Tada
12th Author's Affiliation NEC Corporation/JST CREST(NEC/JST CREST)
Date 2015-04-17
Paper # CPSY2015-8,DC2015-8
Volume (vol) vol.115
Number (no) CPSY-7,DC-8
Page pp.pp.43-48(CPSY), pp.43-48(DC),
#Pages 6
Date of Issue 2015-04-10 (CPSY, DC)