| Presentation | 2024-02-28 Research on Routing Method for Spacer-Is-Metal Type Self-Aligned Double Patterning Koki Tanaka, Takuto Amari, Kunihiro Fujiyoshi, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | SIM type Self-Aligned Double Patterning is one of the process technologies wiring with a pitch half of the exposure-possible pitch. Since wiring patterns obtained by this technology are only cut off circular areas, wiring design is difficult. To work on this problem, Akatsuka et al. clarified some sufficient conditions where given terminals can be wired and showed a wiring method in the case. However, the positional relationships of terminals he named ``Cross Crossing” and ``Triple Overlap” were excluded because of the difficulty of wiring. In this paper, only in some cases including either ``Cross Crossing” or ``Triple Overlap”, we clarify some sufficient conditions where given terminals can be wired and show a wiring method in the case. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Spacer-Is-Metal type Self-Aligned Double Patterning / SIM type SADP / Routing design / LSI |
| Paper # | VLD2023-105,HWS2023-65,ICD2023-94 |
| Date of Issue | 2024-02-21 (VLD, HWS, ICD) |
| Conference Information | |
| Committee | VLD / HWS / ICD |
|---|---|
| Conference Date | 2024/2/28(4days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Shigetoshi Nakatake(Univ. of Kitakyushu) / Daisuke Suzuki(Mitsubishi Electric) / Makoto Ikeda(Univ. of Tokyo) |
| Vice Chair | Yuichi Sakurai(Hitachi) / Yuichi Hayashi(NAIST) / Toru Akishita(Sony Semiconductor Solutions) / Hayato Wakabayashi(Sony Semiconductor Solutions) |
| Secretary | Yuichi Sakurai(Socionext) / Yuichi Hayashi(Hirosaki Univ.) / Toru Akishita(Sony Semiconductor Solutions) / Hayato Wakabayashi(AIST) |
| Assistant | Takuma Nishimoto(Hitachi) / / Ryo Shirai(Kyoto Univ.) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Sony Semiconductor Solutions) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Hardware Security / Technical Committee on Integrated Circuits and Devices |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Research on Routing Method for Spacer-Is-Metal Type Self-Aligned Double Patterning |
| Sub Title (in English) | |
| Keyword(1) | Spacer-Is-Metal type Self-Aligned Double Patterning |
| Keyword(2) | SIM type SADP |
| Keyword(3) | Routing design |
| Keyword(4) | LSI |
| 1st Author's Name | Koki Tanaka |
| 1st Author's Affiliation | Tokyo University of Agriculture and Technology(TUAT) |
| 2nd Author's Name | Takuto Amari |
| 2nd Author's Affiliation | Tokyo University of Agriculture and Technology(TUAT) |
| 3rd Author's Name | Kunihiro Fujiyoshi |
| 3rd Author's Affiliation | Tokyo University of Agriculture and Technology(TUAT) |
| Date | 2024-02-28 |
| Paper # | VLD2023-105,HWS2023-65,ICD2023-94 |
| Volume (vol) | vol.123 |
| Number (no) | VLD-390,HWS-391,ICD-392 |
| Page | pp.pp.36-41(VLD), pp.36-41(HWS), pp.36-41(ICD), |
| #Pages | 6 |
| Date of Issue | 2024-02-21 (VLD, HWS, ICD) |