| Presentation | 2023-11-16 Implementation of Neural Networks in Memory-based Reconfigurable Processor Kenta Sasagawa, Tatsuya Nishikawa, Xihong Zhou, Senling Wang, Hiroshi Kai, Hiroshi Takahashi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With the development of recent IoT technologies，there is a demand to implement intelligent processing in devices where data is generated at the edge of the network，and reconfigurable devices are drawing attention. MRP，one of the reconfigurable devices，is a memory-centric reconfigurable device. Compared to other reconfigurable devices such as FPGA，it excels in processing speed and cost-effectiveness. While it is possible to implement Neural Networks (NN)，which are the core of intelligent processing，the method for implementing a highly reliable NN is not yet established due to its unique structure. Therefore，in this study，we proposed an NN structure adapted to the MRP structure，called MNN，and evaluated its accuracy. Keywords: MRP，Neuron，MNN，Quantization |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MRP / Neuron / MNN / Quantization |
| Paper # | VLD2023-51,ICD2023-59,DC2023-58,RECONF2023-54 |
| Date of Issue | 2023-11-08 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2023/11/15(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Civic Auditorium Sears Home Yume Hall |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2023 -New Field of VLSI Design- |
| Chair | Shigetoshi Nakatake(Univ. of Kitakyushu) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Makoto Ikeda(Univ. of Tokyo) / Hiroyuki Ochi(Ritsumeikan Univ.) |
| Vice Chair | Yuichi Sakurai(Hitachi) / Toshinori Hosokawa(Nihon Univ.) / Yasushi Inoguchi(JAIST) / Tomonori Izumi(Ritsumeikan Univ.) / Hayato Wakabayashi(Sony Semiconductor Solutions) |
| Secretary | Yuichi Sakurai(Socionext) / Toshinori Hosokawa(Hirosaki Univ.) / Yasushi Inoguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Hayato Wakabayashi(NEC) / (Toyohashi Univ. of Tech.) |
| Assistant | Takuma Nishimoto(Hitachi) / / Yukitaka Takemura(INTEL) / Yasunori Osana(Kumamoto Univ.) / Ryo Shirai(Kyoto Univ.) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Kumamoto University) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation of Neural Networks in Memory-based Reconfigurable Processor |
| Sub Title (in English) | |
| Keyword(1) | MRP |
| Keyword(2) | Neuron |
| Keyword(3) | MNN |
| Keyword(4) | Quantization |
| 1st Author's Name | Kenta Sasagawa |
| 1st Author's Affiliation | Ehime University(Ehime Univ.) |
| 2nd Author's Name | Tatsuya Nishikawa |
| 2nd Author's Affiliation | Ehime University(Ehime Univ.) |
| 3rd Author's Name | Xihong Zhou |
| 3rd Author's Affiliation | Ehime University(Ehime Univ.) |
| 4th Author's Name | Senling Wang |
| 4th Author's Affiliation | Ehime University(Ehime Univ.) |
| 5th Author's Name | Hiroshi Kai |
| 5th Author's Affiliation | Ehime University(Ehime Univ.) |
| 6th Author's Name | Hiroshi Takahashi |
| 6th Author's Affiliation | Ehime University(Ehime Univ.) |
| Date | 2023-11-16 |
| Paper # | VLD2023-51,ICD2023-59,DC2023-58,RECONF2023-54 |
| Volume (vol) | vol.123 |
| Number (no) | VLD-258,ICD-259,DC-260,RECONF-261 |
| Page | pp.pp.112-116(VLD), pp.112-116(ICD), pp.112-116(DC), pp.112-116(RECONF), |
| #Pages | 5 |
| Date of Issue | 2023-11-08 (VLD, ICD, DC, RECONF) |