Presentation 2023-11-16
Design and Error-tolerance of FeFET-based CiM for Hyperdimensional Computing
Chihiro Matsui, Eitaro Kobayashi, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A high-speed massively parallel operation for learning and inference in Hyperdimensional Computing (HDC) using voltage-sensing FeFET Computation-in-Memory (CiM) is proposed. Furthermore, this paper shows the error tolerance of the calculation results against errors caused by read-disturb and data-retention in FeFET cells that store 10,000-dimensional hypervectors.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Hyperdimensional Computing / FeFET CiM / Error Tolerance
Paper # VLD2023-48,ICD2023-56,DC2023-55,RECONF2023-51
Date of Issue 2023-11-08 (VLD, ICD, DC, RECONF)

Conference Information
Committee VLD / DC / RECONF / ICD / IPSJ-SLDM
Conference Date 2023/11/15(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Civic Auditorium Sears Home Yume Hall
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2023 -New Field of VLSI Design-
Chair Shigetoshi Nakatake(Univ. of Kitakyushu) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Makoto Ikeda(Univ. of Tokyo) / Hiroyuki Ochi(Ritsumeikan Univ.)
Vice Chair Yuichi Sakurai(Hitachi) / Toshinori Hosokawa(Nihon Univ.) / Yasushi Inoguchi(JAIST) / Tomonori Izumi(Ritsumeikan Univ.) / Hayato Wakabayashi(Sony Semiconductor Solutions)
Secretary Yuichi Sakurai(Socionext) / Toshinori Hosokawa(Hirosaki Univ.) / Yasushi Inoguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Hayato Wakabayashi(NEC) / (Toyohashi Univ. of Tech.)
Assistant Takuma Nishimoto(Hitachi) / / Yukitaka Takemura(INTEL) / Yasunori Osana(Kumamoto Univ.) / Ryo Shirai(Kyoto Univ.) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Kumamoto University)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design and Error-tolerance of FeFET-based CiM for Hyperdimensional Computing
Sub Title (in English)
Keyword(1) Hyperdimensional Computing
Keyword(2) FeFET CiM
Keyword(3) Error Tolerance
1st Author's Name Chihiro Matsui
1st Author's Affiliation The University of Tokyo(Univ. of Tokyo)
2nd Author's Name Eitaro Kobayashi
2nd Author's Affiliation The University of Tokyo(Univ. of Tokyo)
3rd Author's Name Naoko Misawa
3rd Author's Affiliation The University of Tokyo(Univ. of Tokyo)
4th Author's Name Kasidit Toprasertpong
4th Author's Affiliation The University of Tokyo(Univ. of Tokyo)
5th Author's Name Shinichi Takagi
5th Author's Affiliation The University of Tokyo(Univ. of Tokyo)
6th Author's Name Ken Takeuchi
6th Author's Affiliation The University of Tokyo(Univ. of Tokyo)
Date 2023-11-16
Paper # VLD2023-48,ICD2023-56,DC2023-55,RECONF2023-51
Volume (vol) vol.123
Number (no) VLD-258,ICD-259,DC-260,RECONF-261
Page pp.pp.99-100(VLD), pp.99-100(ICD), pp.99-100(DC), pp.99-100(RECONF),
#Pages 2
Date of Issue 2023-11-08 (VLD, ICD, DC, RECONF)