| Presentation | 2023-11-17 Configuration Data Compression for SLM Fine-grained Reconfigurable Logic Souhei Takagi, Takuya Kozima, Hideharu Amano, Morihiro Kuga, Masahiro Iida, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | SLM (Scalable Logic Module) is a fine-grained reconfigurable logic developed by Kumamoto University, characterized by its small configuration information size, which results in a smaller area for logic cells. We are currently developing a new FPGA that incorporates SLM, CPU, switches, and memory. This chip leverages the small configuration information of SLM to store multiple configuration data in internal memory and switch them rapidly. In this paper, we propose a method to compress configuration information, allowing us to store even more configuration data. This compression method can be quickly expanded within the chip and can be implemented with simple hardware. Additionally, the configuration information of the target SLM reconfigurable logic often exhibits recurring patterns within internal modules. Therefore, we propose DMC (Duplicated Module Compression) as a compression method that aligns with these conditions. DMC registers recurring patterns in a dictionary to perform run-length compression. Regarding the expansion circuit, logic synthesis for the NANGATE45nm process was conducted using Synopsys' Design Compiler N-2017.09-SP1. As a result, the expansion circuit, on its own, was found to operate at 1GHz with a small circuit area of 708.9μm2 when a delay was set. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Scalable Logic Module / Run Length Compression / FPGA |
| Paper # | VLD2023-72,ICD2023-80,DC2023-79,RECONF2023-75 |
| Date of Issue | 2023-11-08 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2023/11/15(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Civic Auditorium Sears Home Yume Hall |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2023 -New Field of VLSI Design- |
| Chair | Shigetoshi Nakatake(Univ. of Kitakyushu) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Makoto Ikeda(Univ. of Tokyo) / Hiroyuki Ochi(Ritsumeikan Univ.) |
| Vice Chair | Yuichi Sakurai(Hitachi) / Toshinori Hosokawa(Nihon Univ.) / Yasushi Inoguchi(JAIST) / Tomonori Izumi(Ritsumeikan Univ.) / Hayato Wakabayashi(Sony Semiconductor Solutions) |
| Secretary | Yuichi Sakurai(Socionext) / Toshinori Hosokawa(Hirosaki Univ.) / Yasushi Inoguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Hayato Wakabayashi(NEC) / (Toyohashi Univ. of Tech.) |
| Assistant | Takuma Nishimoto(Hitachi) / / Yukitaka Takemura(INTEL) / Yasunori Osana(Kumamoto Univ.) / Ryo Shirai(Kyoto Univ.) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Kumamoto University) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Configuration Data Compression for SLM Fine-grained Reconfigurable Logic |
| Sub Title (in English) | |
| Keyword(1) | Scalable Logic Module |
| Keyword(2) | Run Length Compression |
| Keyword(3) | FPGA |
| 1st Author's Name | Souhei Takagi |
| 1st Author's Affiliation | Keio University(Keio Univ) |
| 2nd Author's Name | Takuya Kozima |
| 2nd Author's Affiliation | Keio University(Keio Univ) |
| 3rd Author's Name | Hideharu Amano |
| 3rd Author's Affiliation | Keio University(Keio Univ) |
| 4th Author's Name | Morihiro Kuga |
| 4th Author's Affiliation | Kumamoto University(Kumamoto Univ) |
| 5th Author's Name | Masahiro Iida |
| 5th Author's Affiliation | Kumamoto University(Kumamoto Univ) |
| Date | 2023-11-17 |
| Paper # | VLD2023-72,ICD2023-80,DC2023-79,RECONF2023-75 |
| Volume (vol) | vol.123 |
| Number (no) | VLD-258,ICD-259,DC-260,RECONF-261 |
| Page | pp.pp.215-220(VLD), pp.215-220(ICD), pp.215-220(DC), pp.215-220(RECONF), |
| #Pages | 6 |
| Date of Issue | 2023-11-08 (VLD, ICD, DC, RECONF) |