| Presentation | 2023-10-13 Formation process of GaN MOS interface suppressing interfacial oxidation Tsurugi Kondo, Katsunori Ueno, Ryo Tanaka, Shinya Takashima, Masaharu Edo, Tomoyuki Suwa, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we report the effects of MOS interfacial oxidation on electrical properties of GaN MOSFET and show improved electrical properties with formation process of GaN/SiO2 MOS interface suppressing interfacial oxidation. It is confirmed that interfacial oxidation layer on GaN surface can cause degradation in channel mobility and post-annealing threshold voltage. In order to suppress interfacial oxidation, we attempt silicon oxynitride film deposition on GaN surface before SiO2 deposition. XPS analysis clarify that this deposition process can suppress oxidation at MOS interface. GaN MOSFET applied this deposition process show significant improvement of post-annealing threshold voltage and relatively high channel mobility. Thus, suppressing GaOx is essential for high performance. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | GaN MOSFET / Gate Insulating Film / Interfacial Oxidation / Silicon Oxynitride Film / Threshold Voltage / Channel Mobility |
| Paper # | SDM2023-60 |
| Date of Issue | 2023-10-06 (SDM) |
| Conference Information | |
| Committee | SDM |
|---|---|
| Conference Date | 2023/10/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Niche, Tohoku Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Process Science and New Process Technology |
| Chair | Shunichiro Ohmi(Tokyo Inst. of Tech.) |
| Vice Chair | Tatsuya Usami(Rapidus) |
| Secretary | Tatsuya Usami(Tohoku Univ.) |
| Assistant | Takuji Hosoi(Kwansei Gakuin Univ.) / Takuya Futase(Western Digital) |
| Paper Information | |
| Registration To | Technical Committee on Silicon Device and Materials |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Formation process of GaN MOS interface suppressing interfacial oxidation |
| Sub Title (in English) | |
| Keyword(1) | GaN MOSFET |
| Keyword(2) | Gate Insulating Film |
| Keyword(3) | Interfacial Oxidation |
| Keyword(4) | Silicon Oxynitride Film |
| Keyword(5) | Threshold Voltage |
| Keyword(6) | Channel Mobility |
| 1st Author's Name | Tsurugi Kondo |
| 1st Author's Affiliation | Fuji Electric Co., Ltd.(Fuji Electric) |
| 2nd Author's Name | Katsunori Ueno |
| 2nd Author's Affiliation | Fuji Electric Co., Ltd.(Fuji Electric) |
| 3rd Author's Name | Ryo Tanaka |
| 3rd Author's Affiliation | Fuji Electric Co., Ltd.(Fuji Electric) |
| 4th Author's Name | Shinya Takashima |
| 4th Author's Affiliation | Fuji Electric Co., Ltd.(Fuji Electric) |
| 5th Author's Name | Masaharu Edo |
| 5th Author's Affiliation | Fuji Electric Co., Ltd.(Fuji Electric) |
| 6th Author's Name | Tomoyuki Suwa |
| 6th Author's Affiliation | New Industry Creation Hatchery Center, Tohoku University(NICHe, Tohoku Univ.) |
| Date | 2023-10-13 |
| Paper # | SDM2023-60 |
| Volume (vol) | vol.123 |
| Number (no) | SDM-211 |
| Page | pp.pp.40-45(SDM), |
| #Pages | 6 |
| Date of Issue | 2023-10-06 (SDM) |