Presentation 2023-07-06
Autoencoder Based Incremental LSI Test Escape Detection Using Transfer Learning
Ayano Takaya, Michihiro Shintani,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Machine-learning-based test escape detection is gaining attention as a novel approach for detecting faulty large-scale integrated circuits (LSIs) that traditional methods fail to detect. In such scenarios, a model is developed by learning a significant amount of data from the LSI test results and used to test the manufactured LSIs.However, because manufactured LSIs are subject to lot management, the data used for learning are transmitted sequentially, necessitating restarting the learning process from the beginning at each manufacturing stage when new data arrive, leading to prolonged learning times. In this study, we propose a novel test escape detection method utilizing a transfer learning technique that reduces learning times while preserving test accuracy by learning the data of newly manufactured LSIs while maintaining the previously learned model. Evaluations utilizing the LSI production test data indicated that the proposed method can decrease the learning time by more than 40.40% without compromising the test accuracy.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Neural network / Test escape detection / Transfer learning / Incremental learning
Paper # CAS2023-4,VLD2023-4,SIP2023-20,MSS2023-4
Date of Issue 2023-06-29 (CAS, VLD, SIP, MSS)

Conference Information
Committee MSS / CAS / SIP / VLD
Conference Date 2023/7/6(2days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Shingo Yamaguchi(Yamaguchi Univ.) / Yasutoshi Aibara(OmniVision) / Takayuki Nakachi(Ryukyu Univ.) / Shigetoshi Nakatake(Univ. of Kitakyushu)
Vice Chair Toshiyuki Miyamoto(Osaka Inst. of Tech.) / Norihiko Shinomiya(Soka Univ.) / Koichi Ichige(Yokohama National Univ.) / Kiyoshi Nishikawa(okyo Metropolitan Univ.) / Yuichi Sakurai(Hitachi)
Secretary Toshiyuki Miyamoto(Osaka Univ.) / Norihiko Shinomiya(NEC) / Koichi Ichige(Soka Univ.) / Kiyoshi Nishikawa(Renesas Electronics) / Yuichi Sakurai(Chiba Univ.)
Assistant Masato Shirai(Shimane Univ.) / Nao Ito(NIT, Toyama college) / Motoi Yamaguchi(TECHNOPRO) / Shinji Shimoda(Sony Semiconductor Solutions) / Shunsuke Koshita(Hachinohe Inst. of Tech.) / Taichi Yoshida(UEC) / Sayaka Shiota(Tokyo Metropolitan Univ.) / Takuma Nishimoto(Hitachi)

Paper Information
Registration To Technical Committee on Mathematical Systems Science and its Applications / Technical Committee on Circuits and Systems / Technical Committee on Signal Processing / Technical Committee on VLSI Design Technologies
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Autoencoder Based Incremental LSI Test Escape Detection Using Transfer Learning
Sub Title (in English)
Keyword(1) Neural network
Keyword(2) Test escape detection
Keyword(3) Transfer learning
Keyword(4) Incremental learning
1st Author's Name Ayano Takaya
1st Author's Affiliation Kyoto Institute of Technology(KIT)
2nd Author's Name Michihiro Shintani
2nd Author's Affiliation Kyoto Institute of Technology(KIT)
Date 2023-07-06
Paper # CAS2023-4,VLD2023-4,SIP2023-20,MSS2023-4
Volume (vol) vol.123
Number (no) CAS-97,VLD-98,SIP-99,MSS-100
Page pp.pp.16-21(CAS), pp.16-21(VLD), pp.16-21(SIP), pp.16-21(MSS),
#Pages 6
Date of Issue 2023-06-29 (CAS, VLD, SIP, MSS)