| Presentation | 2023-07-24 Tolerance Evaluation Cost Reduction of Deep-Learning-Based Side-Channel Attack Using Signal-to-Noise Ratio of Leakage Traces Tatsuya Sakagami, Masaki Himuro, Kengo Iokibe, Yoshitaka Toyota, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Side-channel attacks (SCA) have been proposed to decrypt modern cryptography by analyzing the physical behavior of cryptographic circuits, and have become a threat to information leakage. SCAs can also break cryptography with masking countermeasures, a popular countermeasure to SCAs, by using deep learning. Therefore, it is necessary to evaluate SCA tolerance for each of possible countermeasures when designing an electronic device with cryptographic functions. For evaluating resistance to DL-SCA, carrying out DL-SCAs on plenty of side-channel leakage traces is required. To reduce the cost of DL-SCA resistance evaluation, this paper proposes a method to reduce the number of measurements of leakage traces for evaluation by simulating the leakage traces after SCA countermeasures are implemented. In the proposed method, leakage traces are measured under a certain evaluation condition. Leakage traces for other evaluation conditions, which demonstrate conditions in DL-SCA countermeasures are implemented, are calculated from the measured traces by superimposing noise components for those other conditions. This study predicts the DL-SCA tolerance based on the proposed method. We measured leakage traces of a microcontroller implementing an AES algorithm with the masking countermeasure at multiple leakage locations. We performed CPA to create noise waveforms and then constructed simulated traces for one of the leakage locations. The results of the DL-SCA showed that 6 out of 12 secret key bytes were recovered from the simulated leakage traces. This is almost consistent with the measured one, in which four bytes were revealed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Deep Learning SCA / Resistance evaluation / AES / Micirocontroller / Correlation Power Analysis |
| Paper # | ISEC2023-17,SITE2023-11,BioX2023-20,HWS2023-17,ICSS2023-14,EMM2023-17 |
| Date of Issue | 2023-07-17 (ISEC, SITE, BioX, HWS, ICSS, EMM) |
| Conference Information | |
| Committee | EMM / BioX / ISEC / SITE / ICSS / HWS / IPSJ-CSEC / IPSJ-SPT |
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| Conference Date | 2023/7/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hokkaido Jichiro Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Michiharu Niimi(Kyushu Inst. of Tech.) / hironobu Takano(Toyama Prefectural Univ.) / Goichiro Hanaoka(AIST) / Takushi Otani(Kibi International Univ.) / Daisuke Inoue(NICT) / Daisuke Suzuki(Mitsubishi Electric) |
| Vice Chair | Kotaro Sonoda(Nagasaki Univ.) / Hyunho Kang(NIT, Tokyo) / Norihiro Okui(KDDI Research) / Emiko Sano(Kubota) / Junji Shikata(Yokohama National Univ.) / Shinsaku Kiyomoto(KDDI Research) / Soichiro Morishita(Cyber Agent) / Takeo Tatsumi(Open Univ. of Japan) / Akira Yamada(Kobe Univ.) / Toshihiro Yamauchi(Okayama Univ.) / Yuichi Hayashi(NAIST) / Toru Akishita(Sony Semiconductor Solutions) |
| Secretary | Kotaro Sonoda(Hiroshima City Univ.) / Hyunho Kang(Osaka Inst. of Tech.) / Norihiro Okui(NEC) / Emiko Sano(Gunma Univ) / Junji Shikata(AIST) / Shinsaku Kiyomoto(Toshiba) / Soichiro Morishita(NRI-Secure) / Takeo Tatsumi(Fukuoka Inst. of Tech.) / Akira Yamada(Mitsubishi Electric) / Toshihiro Yamauchi(Univ. of Electro-Comm.) / Yuichi Hayashi(Sony Semiconductor Solutions) / Toru Akishita(AIST) |
| Assistant | Naofumi Aoki(Hokkaido Univ.) / Kazuaki Nakamura(Tokyo Univ. of Science) / Tomokazu Kawahara(Toshiba) / Shinichi Shirakawa(Yokohama National Univ.) / Hiroki Okada(KDDI Research) / Yusuke Kaneko(Japan Research Institute) / Yo Kanemoto(NTT) / Masaya Sato(Okayama Prefectural Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Enriched MultiMedia / Technical Committee on Biometrics / Technical Committee on Information Security / Technical Committee on Social Implications of Technology and Information Ethics / Technical Committee on Information and Communication System Security / Technical Committee on Hardware Security / Special Interest Group on Computer Security / Special Interest Group on Security Psychology and Trust |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Tolerance Evaluation Cost Reduction of Deep-Learning-Based Side-Channel Attack Using Signal-to-Noise Ratio of Leakage Traces |
| Sub Title (in English) | |
| Keyword(1) | Deep Learning SCA |
| Keyword(2) | Resistance evaluation |
| Keyword(3) | AES |
| Keyword(4) | Micirocontroller |
| Keyword(5) | Correlation Power Analysis |
| 1st Author's Name | Tatsuya Sakagami |
| 1st Author's Affiliation | Okayama University(Okayama Univ.) |
| 2nd Author's Name | Masaki Himuro |
| 2nd Author's Affiliation | Okayama University(Okayama Univ.) |
| 3rd Author's Name | Kengo Iokibe |
| 3rd Author's Affiliation | Okayama University(Okayama Univ.) |
| 4th Author's Name | Yoshitaka Toyota |
| 4th Author's Affiliation | Okayama University(Okayama Univ.) |
| Date | 2023-07-24 |
| Paper # | ISEC2023-17,SITE2023-11,BioX2023-20,HWS2023-17,ICSS2023-14,EMM2023-17 |
| Volume (vol) | vol.123 |
| Number (no) | ISEC-129,SITE-130,BioX-131,HWS-132,ICSS-133,EMM-134 |
| Page | pp.pp.19-24(ISEC), pp.19-24(SITE), pp.19-24(BioX), pp.19-24(HWS), pp.19-24(ICSS), pp.19-24(EMM), |
| #Pages | 6 |
| Date of Issue | 2023-07-17 (ISEC, SITE, BioX, HWS, ICSS, EMM) |