Presentation 2023-03-02
[Memorial Lecture] CNFET7: An Open Source Cell Library for 7-nm CNFET Technology
Chenlin Shi, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, Hiroki Honda,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper, we propose CNFET7, the first open-source cell library for7-nm carbon nanotube field-effect transistor (CNFET) technology. CNFET7 is based on an open-source CNFET SPICE model called VS-CNFET, and various model parameters such as the channel width and carbon nanotube diameter are carefully tuned to mimic the predictive 7-nm CNFET technology presented in a published paper. Some nondisclosure parameters, such as the cell size and pin layout, are derived from those of the NanGate 15-nm open-source cell library in the same way as for an open-source framework for CNFET circuit design. CNFET7 includes two types of delay model (i.e.,the composite current source and nonlinear delay model), each having 56 cells, such as INV_X1 and BUF_X1. CNFET7 supports both logic synthesis and timing-driven place and route in the Cadence design flow. Our experimental results of several synthesized circuits show that CNFET7 has reductions of up to 96%, 62% and 82% in dynamic and static power consumption and critical-path delay, respectively, when compared with ASAP7. In addition, our experimental results of a post-route microprocessor show that CNFET7 has reductions of up to 91%, 66% and 38% in dynamic and static power consumption and critical-path delay, respectively, when compared with ASAP7.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) CNFETLogic SynthesisPlace and RouteOpen-SourceCell library
Paper # VLD2022-92,HWS2022-63
Date of Issue 2023-02-22 (VLD, HWS)

Conference Information
Committee HWS / VLD
Conference Date 2023/3/1(4days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Makoto Nagata(Kobe Univ.) / Minako Ikeda(NTT)
Vice Chair Yuichi Hayashi(NAIST) / Daisuke Suzuki(Mitsubishi Electric) / Shigetoshi Nakatake(Univ. of Kitakyushu)
Secretary Yuichi Hayashi(Sony Semiconductor Solutions) / Daisuke Suzuki(NAIST) / Shigetoshi Nakatake(NBS)
Assistant / Takuma Nishimoto(Hitachi)

Paper Information
Registration To Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) [Memorial Lecture] CNFET7: An Open Source Cell Library for 7-nm CNFET Technology
Sub Title (in English)
Keyword(1) CNFETLogic SynthesisPlace and RouteOpen-SourceCell library
1st Author's Name Chenlin Shi
1st Author's Affiliation The University of Electro-Communications(UEC)
2nd Author's Name Shinobu Miwa
2nd Author's Affiliation The University of Electro-Communications(UEC)
3rd Author's Name Tongxin Yang
3rd Author's Affiliation University of Tokyo(UOT)
4th Author's Name Ryota Shioya
4th Author's Affiliation University of Tokyo(UOT)
5th Author's Name Hayato Yamaki
5th Author's Affiliation The University of Electro-Communications(UEC)
6th Author's Name Hiroki Honda
6th Author's Affiliation The University of Electro-Communications(UEC)
Date 2023-03-02
Paper # VLD2022-92,HWS2022-63
Volume (vol) vol.122
Number (no) VLD-402,HWS-403
Page pp.pp.110-110(VLD), pp.110-110(HWS),
#Pages 1
Date of Issue 2023-02-22 (VLD, HWS)