| Presentation | 2023-01-20 A Study on Low-Power Binary Neural Network Design Using Adiabatic Quantum-Flux-Parametron Logic Tomoharu Yamauchi, Hao San, Nobuyuki Yoshikawa, Olivia Chen, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient，high performance information processing systems．It is a low power dissipation circuits in superconducting digital circuits．In this paper，we introduce an AQFP based binary neural network (BNN) design methodology utilizing an in-memory computing scheme，analog accumulation，and a crossbar structure．The proposed design can effectively resolve the memory issue in superconducting digital circuits by significantly reducing memory usage in a non-Von Neumann fashion compared to conventional neural networks．As a proof of concept，we designed and implemented an 8 × 8 AQFP BNN using the proposed design methodology targeting the AIST 10kA/cm2 4-layer niobium process．The Josephson junction count and energy dissipation of the proposed 8 × 8 BNN design are 2236 and 11.18 aJ，respectively |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | adiabatic logic / superconducting digital circuits / AQFP / binary neural networ |
| Paper # | SCE2022-14 |
| Date of Issue | 2023-01-13 (SCE) |
| Conference Information | |
| Committee | SCE |
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| Conference Date | 2023/1/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Superconducting Electronics |
| Chair | Yoshinao Mizugaki(Univ. of Electro-Comm.) |
| Vice Chair | |
| Secretary | (Fukuoka Inst. of Tech) |
| Assistant | Hiroyuki Akaike(Daido Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Superconductive Electronics |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study on Low-Power Binary Neural Network Design Using Adiabatic Quantum-Flux-Parametron Logic |
| Sub Title (in English) | |
| Keyword(1) | adiabatic logic |
| Keyword(2) | superconducting digital circuits |
| Keyword(3) | AQFP |
| Keyword(4) | binary neural networ |
| 1st Author's Name | Tomoharu Yamauchi |
| 1st Author's Affiliation | Tokyo City University(Tokyo City Univ.) |
| 2nd Author's Name | Hao San |
| 2nd Author's Affiliation | Tokyo City University(Tokyo City Univ.) |
| 3rd Author's Name | Nobuyuki Yoshikawa |
| 3rd Author's Affiliation | Yokohama National University(Yokohama National Univ.) |
| 4th Author's Name | Olivia Chen |
| 4th Author's Affiliation | Tokyo City University(Tokyo City Univ.) |
| Date | 2023-01-20 |
| Paper # | SCE2022-14 |
| Volume (vol) | vol.122 |
| Number (no) | SCE-347 |
| Page | pp.pp.6-11(SCE), |
| #Pages | 6 |
| Date of Issue | 2023-01-13 (SCE) |