Presentation 2023-01-24
Implementing a quantum computer simulator Qulacs on FPGAs
Hideharu Amano, Wei Kaijie, Takefumi Miyoshi, Yoshiki Yamaguchi, Ryohei Niwase,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Quantum computer simulation is indispensable for quantum algorithm research since the results of realquantum computers are influenced by noise and inaccurate controls. Although state vector simulations can show allstates of qubits during computation, they require 2n+4B memory to store all states. Thus, the simulation with morethan 30 qubits is challenging to be executed. This paper proposes to use a Trefoil FPGA board with an extensivestorage system for the quantum simulation. Since Trefoil is not available now, we implemented a high-speed quantumsimulator Qulacs, on M-KUBOS FPGA cluster. The performance of H gate, S gate, CNOT gate, and a dense matrixcomputation for 28-qubit was approximately 1/4 of that of the Ryzen server. By introducing buffering and parallelcomputation techniques, the performance was improved to a similar level to that of the server. The simulation with29-qubit is almost the same execution time as 28-qubit when two boards are used in parallel.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Quantum computer simulation / Multi-FPGA systems / State vector method
Paper # VLD2022-72,RECONF2022-95
Date of Issue 2023-01-16 (VLD, RECONF)

Conference Information
Committee IPSJ-SLDM / RECONF / VLD
Conference Date 2023/1/23(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Raiosha, Hiyoshi Campus, Keio University
Topics (in Japanese) (See Japanese page)
Topics (in English) FPGA Applications, etc.
Chair Hiroyuki Ochi(Ritsumeikan Univ.) / Kentaro Sano(RIKEN) / Minako Ikeda(NTT)
Vice Chair / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Shigetoshi Nakatake(Univ. of Kitakyushu)
Secretary (Tokyo Inst. of Tech.) / Yoshiki Yamaguchi(Meiji Univ.) / Tomonori Izumi(Sony Semiconductor Solutions) / Shigetoshi Nakatake(HITACHI)
Assistant / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Takuma Nishimoto(Hitachi)

Paper Information
Registration To Special Interest Group on System and LSI Design Methodology / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementing a quantum computer simulator Qulacs on FPGAs
Sub Title (in English)
Keyword(1) Quantum computer simulation
Keyword(2) Multi-FPGA systems
Keyword(3) State vector method
1st Author's Name Hideharu Amano
1st Author's Affiliation Keio University(Keio Univ.)
2nd Author's Name Wei Kaijie
2nd Author's Affiliation Keio University(Keio Univ.)
3rd Author's Name Takefumi Miyoshi
3rd Author's Affiliation Wasalabo(Wasalab.)
4th Author's Name Yoshiki Yamaguchi
4th Author's Affiliation University of Tsukuba(U.niv. of Tsukuba)
5th Author's Name Ryohei Niwase
5th Author's Affiliation University of Tsukuba(U.niv. of Tsukuba)
Date 2023-01-24
Paper # VLD2022-72,RECONF2022-95
Volume (vol) vol.122
Number (no) VLD-353,RECONF-354
Page pp.pp.74-79(VLD), pp.74-79(RECONF),
#Pages 6
Date of Issue 2023-01-16 (VLD, RECONF)