| Presentation | 2023-01-27 Common-Mode Current Reduction on Output Cable of Inverters with Impedance Balance Method Taiki Nishimoto, Masahiro Yamaoka, Yasuhiro Arai, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This report presents a novel inverter circuit structure for suppressing common-mode (CM) current on output cable. Adding impedance elements between the output trace of each phase and the bus traces, CM voltage propagation from a certain leg to own-phase output terminal can be described with a bridge-shaped equivalent circuit. Furthermore, connecting output traces mutually with additional impedance elements, CM voltage propagation from a certain leg to other-phase output terminals can also be described with another bridge circuit. Applying impedance balance method, we can suppress noise propagation from each leg to all output terminals simultaneously when both bridge circuits are balanced. We derived the balance condition for the single-phase inverter, and verified that CM voltage transfer ratio can be suppressed. Finally, it was confirmed that CM current decreased by over 20 dB using circuit simulation of the three-phase inverter. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Inverter / Impedance Balance / EMC / Common-Mode Noise |
| Paper # | EMCJ2022-90 |
| Date of Issue | 2023-01-20 (EMCJ) |
| Conference Information | |
| Committee | EMCJ |
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| Conference Date | 2023/1/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | WASHU BLUE RESORT |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Atsuhiro Nishikata(Tokyo Inst. of Tech.) |
| Vice Chair | Kimihiro Tajima(NTT-AT) |
| Secretary | Kimihiro Tajima(Hokkaido Univ.) |
| Assistant | Kiyoto Matsushima(Hitachi) / Kenji Ogata(ADOX) / Toru Matsushima(Kyushu Inst. of Tech.) |
| Paper Information | |
| Registration To | Technical Committee on Electromagnetic Compatibility |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Common-Mode Current Reduction on Output Cable of Inverters with Impedance Balance Method |
| Sub Title (in English) | |
| Keyword(1) | Inverter |
| Keyword(2) | Impedance Balance |
| Keyword(3) | EMC |
| Keyword(4) | Common-Mode Noise |
| 1st Author's Name | Taiki Nishimoto |
| 1st Author's Affiliation | Panasonic Industry Corporation(Panasonic Industry) |
| 2nd Author's Name | Masahiro Yamaoka |
| 2nd Author's Affiliation | Panasonic Industry Corporation(Panasonic Industry) |
| 3rd Author's Name | Yasuhiro Arai |
| 3rd Author's Affiliation | Panasonic Industry Corporation(Panasonic Industry) |
| Date | 2023-01-27 |
| Paper # | EMCJ2022-90 |
| Volume (vol) | vol.122 |
| Number (no) | EMCJ-372 |
| Page | pp.pp.99-104(EMCJ), |
| #Pages | 6 |
| Date of Issue | 2023-01-20 (EMCJ) |