Presentation 2022-11-30
FPGA Implementation and Area Evaluation of JTAG Access Mechanism Using Lightweight One-Time Password Authentication Scheme
Hisashi Okamoto, Jun Ma, Senling Wang, Hiroshi Kai, Hiroshi Takahashi, Akihiro Shimizu,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) When building a cyber-physical system (CPS), it is essential to guarantee the fault tolerance and security of edge devices in the real world. Remote testing using JTAG ports that can access the inside of devices is necessary to improve fault tolerance. However, since the JTAG port may be a backdoor to cyber-attacks, it is essential to take security measures for the JTAG. In this study, we propose a lightweight JTAG authentication mechanism for edge devices using SAS-L2, a one-time password authentication scheme that can deliver cryptographic keys with a very small processing load. The implementation results on FPGA show that the proposed method can realize the one-time password authentication function with lower hardware cost than existing cryptographic methods.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Cyber Physical System(CPS) / JTAG / Boundary Scan / Security / SAS-L2 / FPGA
Paper # VLD2022-48,ICD2022-65,DC2022-64,RECONF2022-71
Date of Issue 2022-11-21 (VLD, ICD, DC, RECONF)

Conference Information
Committee VLD / DC / RECONF / ICD / IPSJ-SLDM
Conference Date 2022/11/28(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kanazawa Bunka Hall
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2022 -New Field of VLSI Design-
Chair Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Hiroyuki Ochi(Ritsumeikan Univ.)
Vice Chair Shigetoshi Nakatake(Univ. of Kitakyushu) / Toshinori Hosokawa(Nihon Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo)
Secretary Shigetoshi Nakatake(NBS) / Toshinori Hosokawa(Hirosaki Univ.) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Toyohashi Univ. of Tech.)
Assistant Takuma Nishimoto(Hitachi) / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Yoshiaki Yoshihara(KIOXIA) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Sony Semiconductor Solutions)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) FPGA Implementation and Area Evaluation of JTAG Access Mechanism Using Lightweight One-Time Password Authentication Scheme
Sub Title (in English)
Keyword(1) Cyber Physical System(CPS)
Keyword(2) JTAG
Keyword(3) Boundary Scan
Keyword(4) Security
Keyword(5) SAS-L2
Keyword(6) FPGA
1st Author's Name Hisashi Okamoto
1st Author's Affiliation Ehime University(Ehime Univ)
2nd Author's Name Jun Ma
2nd Author's Affiliation Ehime University(Ehime Univ)
3rd Author's Name Senling Wang
3rd Author's Affiliation Ehime University(Ehime Univ)
4th Author's Name Hiroshi Kai
4th Author's Affiliation Ehime University(Ehime Univ)
5th Author's Name Hiroshi Takahashi
5th Author's Affiliation Ehime University(Ehime Univ)
6th Author's Name Akihiro Shimizu
6th Author's Affiliation Kochi University of Technology(Kochi Univ. of Technology)
Date 2022-11-30
Paper # VLD2022-48,ICD2022-65,DC2022-64,RECONF2022-71
Volume (vol) vol.122
Number (no) VLD-283,ICD-284,DC-285,RECONF-286
Page pp.pp.168-173(VLD), pp.168-173(ICD), pp.168-173(DC), pp.168-173(RECONF),
#Pages 6
Date of Issue 2022-11-21 (VLD, ICD, DC, RECONF)