Presentation 2022-11-30
Evaluation of Model Quantization Method on Vitis-AI for Mitigating Adversarial Examples
Yuta Fukuda, Kota Yoshida, Takeshi Fujino,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Adversarial examples (AEs) are security threats in deep neural networks (DNNs). One of the countermeasures is adversarial training (AT), and it trains DNNs by using a training dataset containing AEs to achieve robustness against AEs. On the other hand, it has been reported that the robustness of AT is lost when it quantizes AT-trained model parameters from the commonly used 32-bit floating point to 8-bit integer number to run DNN on edge devices such as FPGA. In a previous study, we pointed out that the cause is in a fine-tuning process in the quantization method that uses natural samples to deal with quantization errors. We have proposed quantization-aware adversarial training (QAAT) to address the problem, which optimizes DNNs by conducting AT in quantization flow. In this paper, we construct a QAAT model using Vitis-AI provided by Xilinx. We actually run on the evaluation board ZCU104, which is equipped with Zynq UltraScale+, and we evaluate the robustness of a QAAT-trained model against AEs.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Adversarial examples / Adversarial training / Vitis-AI / FPGA
Paper # VLD2022-51,ICD2022-68,DC2022-67,RECONF2022-74
Date of Issue 2022-11-21 (VLD, ICD, DC, RECONF)

Conference Information
Committee VLD / DC / RECONF / ICD / IPSJ-SLDM
Conference Date 2022/11/28(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kanazawa Bunka Hall
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2022 -New Field of VLSI Design-
Chair Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Hiroyuki Ochi(Ritsumeikan Univ.)
Vice Chair Shigetoshi Nakatake(Univ. of Kitakyushu) / Toshinori Hosokawa(Nihon Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo)
Secretary Shigetoshi Nakatake(NBS) / Toshinori Hosokawa(Hirosaki Univ.) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Toyohashi Univ. of Tech.)
Assistant Takuma Nishimoto(Hitachi) / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Yoshiaki Yoshihara(KIOXIA) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Sony Semiconductor Solutions)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluation of Model Quantization Method on Vitis-AI for Mitigating Adversarial Examples
Sub Title (in English)
Keyword(1) Adversarial examples
Keyword(2) Adversarial training
Keyword(3) Vitis-AI
Keyword(4) FPGA
1st Author's Name Yuta Fukuda
1st Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
2nd Author's Name Kota Yoshida
2nd Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
3rd Author's Name Takeshi Fujino
3rd Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
Date 2022-11-30
Paper # VLD2022-51,ICD2022-68,DC2022-67,RECONF2022-74
Volume (vol) vol.122
Number (no) VLD-283,ICD-284,DC-285,RECONF-286
Page pp.pp.182-187(VLD), pp.182-187(ICD), pp.182-187(DC), pp.182-187(RECONF),
#Pages 6
Date of Issue 2022-11-21 (VLD, ICD, DC, RECONF)