| Presentation | 2022-11-30 FPGA Implementation of Learned Image Compression Heming Sun, Qingyang Yi, Jiro Katto, Masahiro Fujita, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Learned image compression (LIC) has reached a superior coding gain than traditional hand-crafted standards such as JPEG and JPEG2K. Most LIC frameworks are floating-point arithmetic, and they are accelerated by GPU. However, the rounding error of floating-point computation will cause the decoding failure if encoding and decoding are performed on different platforms. Therefore, LIC with a fixed-point arithmetic is highly required. This paper gives an FPGA implementation of a LIC with 8-bit fixed-point quantization. Compared with the state-of-the-art FPGA-based LIC implementation, our system can reach 5x faster coding speed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGAImage CodingNeural Network |
| Paper # | VLD2022-53,ICD2022-70,DC2022-69,RECONF2022-76 |
| Date of Issue | 2022-11-21 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2022/11/28(3days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kanazawa Bunka Hall |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2022 -New Field of VLSI Design- |
| Chair | Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Hiroyuki Ochi(Ritsumeikan Univ.) |
| Vice Chair | Shigetoshi Nakatake(Univ. of Kitakyushu) / Toshinori Hosokawa(Nihon Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo) |
| Secretary | Shigetoshi Nakatake(NBS) / Toshinori Hosokawa(Hirosaki Univ.) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Toyohashi Univ. of Tech.) |
| Assistant | Takuma Nishimoto(Hitachi) / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Yoshiaki Yoshihara(KIOXIA) / Jun Shiomi(Osaka Univ.) / Takeshi Kuboki(Sony Semiconductor Solutions) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA Implementation of Learned Image Compression |
| Sub Title (in English) | |
| Keyword(1) | FPGAImage CodingNeural Network |
| 1st Author's Name | Heming Sun |
| 1st Author's Affiliation | Waseda University(Waseda U) |
| 2nd Author's Name | Qingyang Yi |
| 2nd Author's Affiliation | The University of Tokyo(UTokyo) |
| 3rd Author's Name | Jiro Katto |
| 3rd Author's Affiliation | Waseda University(Waseda U) |
| 4th Author's Name | Masahiro Fujita |
| 4th Author's Affiliation | The University of Tokyo(UTokyo) |
| Date | 2022-11-30 |
| Paper # | VLD2022-53,ICD2022-70,DC2022-69,RECONF2022-76 |
| Volume (vol) | vol.122 |
| Number (no) | VLD-283,ICD-284,DC-285,RECONF-286 |
| Page | pp.pp.194-199(VLD), pp.194-199(ICD), pp.194-199(DC), pp.194-199(RECONF), |
| #Pages | 6 |
| Date of Issue | 2022-11-21 (VLD, ICD, DC, RECONF) |