Presentation | 2022-08-25 [Invited Talk] Development of wafer quality evaluation platform for realization of high-reliable SiC power semiconductor devices Junji Senzaki, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Various power supplies and inverters equipped with SiC power semiconductor devices that realize energy saving and miniaturization and weight reduction of power electronics products are being put into practical use. However, since the quality of SiC wafers reduces the reliability and yield of devices, it is an urgent issue to improve the quality and stable supply of SiC wafers for system application to electric vehicles and infrastructure in the future. In this presentation, we report on the development of quality evaluation and analysis technology for SiC wafers and their international standardization efforts to support the practical application of SiC power semiconductor devices. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Power Semiconductor / SiC / Defect Inspection / Device Reliability / International Standard |
Paper # | R2022-17,EMD2022-5,CPM2022-22,OPE2022-48,LQE2022-11 |
Date of Issue | 2022-08-18 (R, EMD, CPM, OPE, LQE) |
Conference Information | |
Committee | EMD / R / LQE / OPE / CPM |
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Conference Date | 2022/8/25(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | Takahiro Ueno(Nippon Inst. of Tech.) / Tadashi Dohi(Hiroshima Univ.) / Junichi Takahara(Osaka Univ.) / Toshikazu Hashimoto(NTT) / Yuichi Nakamura(Toyohashi Univ. of Tech.) |
Vice Chair | / Yasushi Kadota(Ricoh) / Kosuke Nishimura(KDDI Research) / Taro Arakawa(Yokohama National Univ.) / Hideki Nakazawa(Hirosaki Univ.) |
Secretary | (NAIST) / Yasushi Kadota(Fujitsu Component) / Kosuke Nishimura(Hiroshima Univ.) / Taro Arakawa(Kansai Univ.) / Hideki Nakazawa(Fujitsu) |
Assistant | Yoshiki Kayano(Univ. of Electro-Comm.) / Shinji Yokogawa(Univ. of Electro-Comm.) / Takahide Yoshikawa(Fujitsu Lab.) / Takenori Sakumura(Housei Univ.) / Yoshiaki Nishijima(Yokohama National Univ.) / Nobuhiko Nishiyama(Tokyo Inst. of Tech.) / Yuhei Ishizaka(Kanto Gakuin Univ.) / Takeshi Umeki(NTT) / Yasuo Kimura(Tokyo Univ. of Tech.) / Fumihiko Hirose(Yamagata Univ.) / Noriko Bamba(Shinshu Univ.) |
Paper Information | |
Registration To | Technical Committee on Electromechanical Devices / Technical Committee on Reliability / Technical Committee on Lasers and Quantum Electronics / Technical Committee on OptoElectronics / Technical Committee on Component Parts and Materials |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | [Invited Talk] Development of wafer quality evaluation platform for realization of high-reliable SiC power semiconductor devices |
Sub Title (in English) | |
Keyword(1) | Power Semiconductor |
Keyword(2) | SiC |
Keyword(3) | Defect Inspection |
Keyword(4) | Device Reliability |
Keyword(5) | International Standard |
1st Author's Name | Junji Senzaki |
1st Author's Affiliation | National Institute of Advanced Industrial Science and Technology(AIST) |
Date | 2022-08-25 |
Paper # | R2022-17,EMD2022-5,CPM2022-22,OPE2022-48,LQE2022-11 |
Volume (vol) | vol.122 |
Number (no) | R-156,EMD-157,CPM-158,OPE-159,LQE-160 |
Page | pp.pp.7-12(R), pp.7-12(EMD), pp.7-12(CPM), pp.7-12(OPE), pp.7-12(LQE), |
#Pages | 6 |
Date of Issue | 2022-08-18 (R, EMD, CPM, OPE, LQE) |