Presentation 2022-07-27
擬似ブール最適化を用いたFFR出力信号線遷移とWSAの相関に基づく低消費電力指向ドントケア割当て法
Enrei Jo, Rei Miura, Toshinori Hosokawa, Masayosi Yoshimura,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In recent years, with the low power design of VLSIs, many low power oriented don't care (X) identification methods and X-filling methods have been proposed to perform low power testing. As a result, the number of capture-unsafe test vectors in the test set generated by modifying the initial test set was drastically reduced. However, for some circuits, capture-unsafe test vectors remain in the modified test set. In this paper, we propose an X-filling method using pseudo-Boolean optimization. The experimental results for the ISCAS'89 benchmark circuits and ITC'99 benchmark circuits show that the number of capture-unsafe test vectors in the test set modified by the proposed X-filling method was 0. In addition, to accelerate the time of the X-filling method, we also propose an X-filling method using the correlation between the transition on the output signal lines of fanout-free regions and WSA. The experimental results show that the X-filling method using the correlation could modify 92% test vectors in initial test sets to capture-safe test vectors on average, and reduce the CPU time by 20% on average compared to the X-filling method using PBO.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Pseudo-Boolean optimization / FFR / Low power consumption / Don't care Filling
Paper # CPSY2022-1,DC2022-1
Date of Issue 2022-07-20 (CPSY, DC)

Conference Information
Committee CPSY / DC / IPSJ-ARC
Conference Date 2022/7/27(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kaikyo Messe Shimonoseki
Topics (in Japanese) (See Japanese page)
Topics (in English) SWoPP2022: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
Chair Michihiro Koibuchi(NII) / Tatsuhiro Tsuchiya(Osaka Univ.) / 津邑 公暁(名工大)
Vice Chair Kota Nakajima(Fujitsu Lab.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Toshinori Hosokawa(Nihon Univ.)
Secretary Kota Nakajima(JAIST) / Tomoaki Tsumura(Hitachi) / Toshinori Hosokawa(Nihon Univ.) / (Chiba Univ.)
Assistant Ryohei Kobayashi(Tsukuba Univ.) / Takaaki Miyajima(Meiji Univ.)

Paper Information
Registration To Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture
Language JPN-ONLY
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English)
Sub Title (in English)
Keyword(1) Pseudo-Boolean optimization
Keyword(2) FFR
Keyword(3) Low power consumption
Keyword(4) Don't care Filling
1st Author's Name Enrei Jo
1st Author's Affiliation Nihon University(Nihon Univ)
2nd Author's Name Rei Miura
2nd Author's Affiliation Nihon University(Nihon Univ)
3rd Author's Name Toshinori Hosokawa
3rd Author's Affiliation Nihon University(Nihon Univ)
4th Author's Name Masayosi Yoshimura
4th Author's Affiliation Kyoto Sangyo University(KSU)
Date 2022-07-27
Paper # CPSY2022-1,DC2022-1
Volume (vol) vol.122
Number (no) CPSY-133,DC-134
Page pp.pp.1-6(CPSY), pp.1-6(DC),
#Pages 6
Date of Issue 2022-07-20 (CPSY, DC)