| Presentation | 2022-06-08 Investigation of methods to accelerate inference processing by deep learning Seiya Iwamoto, Chikako Nakanishi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | AI technologies such as deep learning are generally computationally intensive and have very high performance requirements to run on CPUs. We propose an inexpensive and low-power implementation method using SoC FPGAs to realize "edge AI" that performs inference processing at edge terminals. Using EfficientNet as an example, we analyze the computational structure of EfficientNet and create a circuit that accelerates the processing that takes up most of the processing time. By measuring the processing time of the created system, we analyzed the processing of each segment of the circuit and verified where the acceleration was achieved. We then studied methods for further acceleration, and by implementing and re-measuring the circuits, we investigated the means necessary to reduce the processing time and considered effective reduction methods. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | deep learning / inference processing / SoC FPGA / EfficientNet / shared memory / Cache Management |
| Paper # | RECONF2022-13 |
| Date of Issue | 2022-05-31 (RECONF) |
| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2022/6/7(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | CCS, Univ. of Tsukuba |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable system, etc. |
| Chair | Kentaro Sano(RIKEN) |
| Vice Chair | Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) |
| Secretary | Yoshiki Yamaguchi(NEC) / Tomonori Izumi(Toyohashi Univ. of Tech.) |
| Assistant | Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Investigation of methods to accelerate inference processing by deep learning |
| Sub Title (in English) | |
| Keyword(1) | deep learning |
| Keyword(2) | inference processing |
| Keyword(3) | SoC FPGA |
| Keyword(4) | EfficientNet |
| Keyword(5) | shared memory |
| Keyword(6) | Cache Management |
| 1st Author's Name | Seiya Iwamoto |
| 1st Author's Affiliation | Osaka Institute of Technology(OIT) |
| 2nd Author's Name | Chikako Nakanishi |
| 2nd Author's Affiliation | Osaka Institute of Technology(OIT) |
| Date | 2022-06-08 |
| Paper # | RECONF2022-13 |
| Volume (vol) | vol.122 |
| Number (no) | RECONF-60 |
| Page | pp.pp.52-56(RECONF), |
| #Pages | 5 |
| Date of Issue | 2022-05-31 (RECONF) |