| Presentation | 2022-03-01 A Logic Locking Method based on SFLL-hd at Register Transfer Level Yohei Noguchi, Masayoshi Yoshimura, Atsuya Tsujikawa, Toshinori Hosokawa, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, with the increase of VLSI integration, LSI design companies utilize circuit design information, called IP cores from IP vendors in order to reduce design costs. However, since IP cores are digital data, it is easy to infringe copyright by copying, etc. Therefore, it is important to take measures against copyright infringement of IP cores. As a design method for copyright protection of IP cores, a method called logical encryption has been proposed. On the other hand, efficient attack methods against logical encryption, such as SAT and FALL attacks, have been proposed. Therefore, there is a need for logical encryption that is resistant to these attack methods. In this paper, we propose a method for RTL design based on SFLL-hd, which is resistant to SAT and FALL attacks. For controllers at RTL, we show an algorithm to find a correct key input to realize SFLL-hd. Experimental results show that the proposed method is resistant to the FALL attack. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Logic Locking / SAT attack / FALL attack / RTL |
| Paper # | DC2021-72 |
| Date of Issue | 2022-02-22 (DC) |
| Conference Information | |
| Committee | DC |
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| Conference Date | 2022/3/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Hiroshi Takahashi(Ehime Univ.) |
| Vice Chair | Tatsuhiro Tsuchiya(Osaka Univ.) |
| Secretary | Tatsuhiro Tsuchiya(Nihon Univ.) |
| Assistant | |
| Paper Information | |
| Registration To | Technical Committee on Dependable Computing |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Logic Locking Method based on SFLL-hd at Register Transfer Level |
| Sub Title (in English) | |
| Keyword(1) | Logic Locking |
| Keyword(2) | SAT attack |
| Keyword(3) | FALL attack |
| Keyword(4) | RTL |
| 1st Author's Name | Yohei Noguchi |
| 1st Author's Affiliation | Kyoto Sangyo University(Kyoto Sangyo Univ.) |
| 2nd Author's Name | Masayoshi Yoshimura |
| 2nd Author's Affiliation | Kyoto Sangyo University(Kyoto Sangyo Univ.) |
| 3rd Author's Name | Atsuya Tsujikawa |
| 3rd Author's Affiliation | Nihon University(Nihon Univ.) |
| 4th Author's Name | Toshinori Hosokawa |
| 4th Author's Affiliation | Nihon University(Nihon Univ.) |
| Date | 2022-03-01 |
| Paper # | DC2021-72 |
| Volume (vol) | vol.121 |
| Number (no) | DC-388 |
| Page | pp.pp.45-50(DC), |
| #Pages | 6 |
| Date of Issue | 2022-02-22 (DC) |