| Presentation | 2022-01-24 IMAX2を用いた高効率な疎行列-疎行列積の実装 , , , |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The current development of simulators and machine learning technologies in science and technology is expected to lead to an explosive demand for computation. On the other hand, Japan is aiming to achieve a low-carbon society, where carbon dioxide emissions are reduced. Therefore, it is important to develop a highly efficient computing infrastructure that can achieve high performance with low power consumption. In this study, we propose an efficient computation method for sparse matrix-sparse matrix multiplication (SpGEMM), which is often used in scientific and engineering calculations, by implementing an additional sparse matrix-sparse matrix multiplication mechanism in IMAX2, a CGRA with sparse matrix compression. In the prototype environment on FPGA, IMAX2 is evaluated and estimated to be 14 times more efficient than Jetson TX2 and 30 times more efficient than RTX3090 when implemented in ASIC. |
| Keyword(in Japanese) | (See Japanese page) |
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| Paper # | VLD2021-56,CPSY2021-25,RECONF2021-64 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | RECONF / VLD / CPSY / IPSJ-ARC / IPSJ-SLDM |
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| Conference Date | 2022/1/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Kentaro Sano(RIKEN) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Michihiro Koibuchi(NII) / Hiroshi Inoue(Kyushu Univ.) / Yuichi Nakamura(NEC) |
| Vice Chair | Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Minako Ikeda(NTT) / Kota Nakajima(Fujitsu Lab.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) |
| Secretary | Yoshiki Yamaguchi(NEC) / Tomonori Izumi(Tokyo Inst. of Tech.) / Minako Ikeda(Osaka Univ.) / Kota Nakajima(NEC) / Tomoaki Tsumura(JAIST) / (Hitachi) / (Univ. of Tokyo) |
| Assistant | Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / / Ryohei Kobayashi(Tsukuba Univ.) / Takaaki Miyajima(Meiji Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN-ONLY |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
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| 1st Author's Affiliation | () |
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| Date | 2022-01-24 |
| Paper # | VLD2021-56,CPSY2021-25,RECONF2021-64 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-342,CPSY-343,RECONF-344 |
| Page | pp.pp.38-42(VLD), pp.38-42(CPSY), pp.38-42(RECONF), |
| #Pages | 5 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |