| Presentation | 2022-01-25 An Implementation of a Real-time Stereo Matching System on FPGA Kaijie Wei, Yuki Kuno, Masatoshi Arai, Hideharu Amano, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | To make full use of stereo data in autonomous driving system, the techniques to generate depth-map in real-time are necessary for the users. Semi-Global Matching(SGM) has been widely accepted to derive depth information in the field of computer vision. Generally, GPU is always an acceptable choice to meet the requirements of real-time. However, the high energy and resource consumption on GPU brings a burden on edge devices. Thus, FPGA has been a promising platform for its benefit of energy efficiency and high-speed performance. With considering the maintenance, we choose Vitis HLS 2020.1 as our tool and achieve 45.45 fps on the input source of 1920 x 1080, which is 1.28x faster than the performance on GPU Tegra X2. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Stereo matching / SGM / AXI Streaming / Slide window / Vitis HLS |
| Paper # | VLD2021-65,CPSY2021-34,RECONF2021-73 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | RECONF / VLD / CPSY / IPSJ-ARC / IPSJ-SLDM |
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| Conference Date | 2022/1/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Kentaro Sano(RIKEN) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Michihiro Koibuchi(NII) / Hiroshi Inoue(Kyushu Univ.) / Yuichi Nakamura(NEC) |
| Vice Chair | Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Minako Ikeda(NTT) / Kota Nakajima(Fujitsu Lab.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) |
| Secretary | Yoshiki Yamaguchi(NEC) / Tomonori Izumi(Tokyo Inst. of Tech.) / Minako Ikeda(Osaka Univ.) / Kota Nakajima(NEC) / Tomoaki Tsumura(JAIST) / (Hitachi) / (Univ. of Tokyo) |
| Assistant | Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / / Ryohei Kobayashi(Tsukuba Univ.) / Takaaki Miyajima(Meiji Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Implementation of a Real-time Stereo Matching System on FPGA |
| Sub Title (in English) | |
| Keyword(1) | Stereo matching |
| Keyword(2) | SGM |
| Keyword(3) | AXI Streaming |
| Keyword(4) | Slide window |
| Keyword(5) | Vitis HLS |
| 1st Author's Name | Kaijie Wei |
| 1st Author's Affiliation | Keio University(Keio Univ.) |
| 2nd Author's Name | Yuki Kuno |
| 2nd Author's Affiliation | Marelli Corporation(Marelli Corp.) |
| 3rd Author's Name | Masatoshi Arai |
| 3rd Author's Affiliation | Saitama University(Saitama Univ.) |
| 4th Author's Name | Hideharu Amano |
| 4th Author's Affiliation | Keio University(Keio Univ.) |
| Date | 2022-01-25 |
| Paper # | VLD2021-65,CPSY2021-34,RECONF2021-73 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-342,CPSY-343,RECONF-344 |
| Page | pp.pp.90-95(VLD), pp.90-95(CPSY), pp.90-95(RECONF), |
| #Pages | 6 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |