| Presentation | 2022-01-25 FPGA Implementation of Radar Imaging for Walk-Through Security Screening System Tatsuya Sumiya, Yuki Kobayashi, Masayuki Ariyoshi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | To enhance security at facilities such as railway stations and commercial buildings where many people come and go without losing user convenience, we have developed a walk-through security screening system which does not require people to stop walking. This system generates images of the screening target based on microwave radar, and detects concealed dangerous objects from those images. Imaging function needs a large amount of processing, and in addition a high frame rate (at least 10 fps) is also required to screen the moving target. Although our current prototype works on a large GPU server, it is desirable to minimize the entire system for practical applications. Therefore, we focus on FPGA that has advantage in minimization, and implement imaging processing on it. With appropriate parallel processing design and implementation, it is confirmed that imaging runs within 70 ms (<100 ms), which is fast enough to achieve 10 fps rate. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Imaging / Radar / FPGA / Security Screening |
| Paper # | VLD2021-64,CPSY2021-33,RECONF2021-72 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | RECONF / VLD / CPSY / IPSJ-ARC / IPSJ-SLDM |
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| Conference Date | 2022/1/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Kentaro Sano(RIKEN) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Michihiro Koibuchi(NII) / Hiroshi Inoue(Kyushu Univ.) / Yuichi Nakamura(NEC) |
| Vice Chair | Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Minako Ikeda(NTT) / Kota Nakajima(Fujitsu Lab.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) |
| Secretary | Yoshiki Yamaguchi(NEC) / Tomonori Izumi(Tokyo Inst. of Tech.) / Minako Ikeda(Osaka Univ.) / Kota Nakajima(NEC) / Tomoaki Tsumura(JAIST) / (Hitachi) / (Univ. of Tokyo) |
| Assistant | Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / / Ryohei Kobayashi(Tsukuba Univ.) / Takaaki Miyajima(Meiji Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA Implementation of Radar Imaging for Walk-Through Security Screening System |
| Sub Title (in English) | |
| Keyword(1) | Imaging |
| Keyword(2) | Radar |
| Keyword(3) | FPGA |
| Keyword(4) | Security Screening |
| 1st Author's Name | Tatsuya Sumiya |
| 1st Author's Affiliation | NEC Corporation(NEC) |
| 2nd Author's Name | Yuki Kobayashi |
| 2nd Author's Affiliation | NEC Corporation(NEC) |
| 3rd Author's Name | Masayuki Ariyoshi |
| 3rd Author's Affiliation | NEC Corporation(NEC) |
| Date | 2022-01-25 |
| Paper # | VLD2021-64,CPSY2021-33,RECONF2021-72 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-342,CPSY-343,RECONF-344 |
| Page | pp.pp.84-89(VLD), pp.84-89(CPSY), pp.84-89(RECONF), |
| #Pages | 6 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |