Presentation 2022-01-24
Full Hardware Implementation of RTOS-Based Systems Using General-Purpose High-Level Synthesizer
Takuya Ando, Yugo Ishii, Nagisa Ishiura, Hiroyuki Tomiyama, Hiroyuki Kanbara,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This article proposes a method for implementing a whole RTOS-based system as hardware using general-purpose high-level synthesizer. Muguruma has proposed a scheme where both all the tasks/handlers and all the RTOS functions are implemented as hardware. However, it assumes the use of a dedicated binary synthesizer, ACAP, where generated task modules have stall ports for suspending their execution and accesses to globally shared variables are realized as loads/stores using automatically generated addresses, which are not necessarily possible by general high-level synthesizers. This paper proposes a method where execution of tasks is controlled by allowing/disabling execution of service calls from the tasks, and code transformation using a wrapper class for shared variable accesses and functions within a function, to make general high-level synthesizers applicable to the full-hardware scheme. Based on the proposed methods, a hardware module for a reduced version of sample1 bundled with TOPPERS/ASP has been successfully implemented as hardware using Xilinx Vitis HLS, where the size of the resulting circuit was substantially smaller than that by the previous method.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Real-Time Systems / RTOS / System Synthesis / Hardware Accelerator / TOPPERS/ASP3 / High-Level Synthesis
Paper # VLD2021-51,CPSY2021-20,RECONF2021-59
Date of Issue 2022-01-17 (VLD, CPSY, RECONF)

Conference Information
Committee RECONF / VLD / CPSY / IPSJ-ARC / IPSJ-SLDM
Conference Date 2022/1/24(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Online
Topics (in Japanese) (See Japanese page)
Topics (in English) FPGA Applications, etc.
Chair Kentaro Sano(RIKEN) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Michihiro Koibuchi(NII) / Hiroshi Inoue(Kyushu Univ.) / Yuichi Nakamura(NEC)
Vice Chair Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Minako Ikeda(NTT) / Kota Nakajima(Fujitsu Lab.) / Tomoaki Tsumura(Nagoya Inst. of Tech.)
Secretary Yoshiki Yamaguchi(NEC) / Tomonori Izumi(Tokyo Inst. of Tech.) / Minako Ikeda(Osaka Univ.) / Kota Nakajima(NEC) / Tomoaki Tsumura(JAIST) / (Hitachi) / (Univ. of Tokyo)
Assistant Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / / Ryohei Kobayashi(Tsukuba Univ.) / Takaaki Miyajima(Meiji Univ.)

Paper Information
Registration To Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Technical Committee on Computer Systems / Special Interest Group on System Architecture / Special Interest Group on System and LSI Design Methodology
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Full Hardware Implementation of RTOS-Based Systems Using General-Purpose High-Level Synthesizer
Sub Title (in English)
Keyword(1) Real-Time Systems
Keyword(2) RTOS
Keyword(3) System Synthesis
Keyword(4) Hardware Accelerator
Keyword(5) TOPPERS/ASP3
Keyword(6) High-Level Synthesis
1st Author's Name Takuya Ando
1st Author's Affiliation Kwansei Gakuin University(Kwansei Gakuin Univ.)
2nd Author's Name Yugo Ishii
2nd Author's Affiliation Kwansei Gakuin University(Kwansei Gakuin Univ.)
3rd Author's Name Nagisa Ishiura
3rd Author's Affiliation Kwansei Gakuin University(Kwansei Gakuin Univ.)
4th Author's Name Hiroyuki Tomiyama
4th Author's Affiliation Ritsumeikan University(Ritsumeikan Univ.)
5th Author's Name Hiroyuki Kanbara
5th Author's Affiliation Advanced Science, Technology & Management Research Institute of KYOTO(ASTEM RI/KYOTO)
Date 2022-01-24
Paper # VLD2021-51,CPSY2021-20,RECONF2021-59
Volume (vol) vol.121
Number (no) VLD-342,CPSY-343,RECONF-344
Page pp.pp.13-18(VLD), pp.13-18(CPSY), pp.13-18(RECONF),
#Pages 6
Date of Issue 2022-01-17 (VLD, CPSY, RECONF)