| Presentation | 2021-12-02 Development of Spiking Neural Network with Mem Capacitor Atsushi Sawada, Reon Oshio, Mutsumi Kimura, Renyuan Zhang, Yasuhiko Nakashima, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Research on artificial intelligence is developing rapidly, and there is an increasing need for the development of computers that specialize in the operation of artificial intelligence and enable low power consumption. One of these efforts is a neuromorphic system that mimics the neural circuits of the brain with hardware, and spiking neural networks in particular are attracting attention for their high energy efficiency. In this research, we propose a spiking neural network using a Mem capacitor and a pulse integrator circuit. By improving the conversion method between synaptic strength and capacitance on the circuit obtained by learning on simulation, we succeeded in reducing the loss of MNIST recognition accuracy to 9%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Memcapacitor / Spiking Neural Network / Pulse integrator circuit |
| Paper # | VLD2021-32,ICD2021-42,DC2021-38,RECONF2021-40 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2021/12/1(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2021 -New Field of VLSI Design- |
| Chair | Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Hiroshi Takahashi(Ehime Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Yuichi Nakamura(NEC) |
| Vice Chair | Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo) |
| Secretary | Minako Ikeda(Osaka Univ.) / Tatsuhiro Tsuchiya(NEC) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Tokyo Inst. of Tech.) |
| Assistant | / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Kosuke Miyaji(Shinshu Univ.) / Yoshiaki Yoshihara(キオクシア) / Takeshi Kuboki(Kyushu Univ.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of Spiking Neural Network with Mem Capacitor |
| Sub Title (in English) | Reduction of recognition accuracy loss by improving the conversion method between synaptic strength and capacitance |
| Keyword(1) | Memcapacitor |
| Keyword(2) | Spiking Neural Network |
| Keyword(3) | Pulse integrator circuit |
| 1st Author's Name | Atsushi Sawada |
| 1st Author's Affiliation | Nara Institute of Science and Technology(NAIST) |
| 2nd Author's Name | Reon Oshio |
| 2nd Author's Affiliation | Nara Institute of Science and Technology(NAIST) |
| 3rd Author's Name | Mutsumi Kimura |
| 3rd Author's Affiliation | Nara Institute of Science and Technology(NAIST) |
| 4th Author's Name | Renyuan Zhang |
| 4th Author's Affiliation | Nara Institute of Science and Technology(NAIST) |
| 5th Author's Name | Yasuhiko Nakashima |
| 5th Author's Affiliation | Nara Institute of Science and Technology(NAIST) |
| Date | 2021-12-02 |
| Paper # | VLD2021-32,ICD2021-42,DC2021-38,RECONF2021-40 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-277,ICD-278,DC-279,RECONF-280 |
| Page | pp.pp.87-92(VLD), pp.87-92(ICD), pp.87-92(DC), pp.87-92(RECONF), |
| #Pages | 6 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |