| Presentation | 2021-12-01 Improving Accuracy of Addition for Stochastic Computing Ichilawa Katsuhiro, Shigeru Yamashita, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Stochastic Computing (SC) is an approximate computing paradigm to perform calculations by using Stochastic Numbers (SNs) which are bit-streams representing values by their probabilities to be 1. We use a multiplexer to perform addition operations in SC, but the value of an addition becomes half. This means that addition operations in SC loose some information; there is a scaling error. Accordingly, this paper proposes two novel method to realize SC-adder without using a multiplexer. The first is a bit-storing saturation adder with an error-correcting bit-storing added to the SC saturation adder that uses an OR gate. The second is an SN compression saturation adder that realizes addition by expressing the SNs used for SC operations with a smaller number of SNs. By combining these two methods, we propose an adder with higher calculation accuracy than an adder using a multiplexer. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Stochastic Computing / Adder with Multiplexer / Scaling / Saturation Adder |
| Paper # | VLD2021-27,ICD2021-37,DC2021-33,RECONF2021-35 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2021/12/1(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2021 -New Field of VLSI Design- |
| Chair | Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Hiroshi Takahashi(Ehime Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Yuichi Nakamura(NEC) |
| Vice Chair | Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo) |
| Secretary | Minako Ikeda(Osaka Univ.) / Tatsuhiro Tsuchiya(NEC) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Tokyo Inst. of Tech.) |
| Assistant | / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Kosuke Miyaji(Shinshu Univ.) / Yoshiaki Yoshihara(キオクシア) / Takeshi Kuboki(Kyushu Univ.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improving Accuracy of Addition for Stochastic Computing |
| Sub Title (in English) | |
| Keyword(1) | Stochastic Computing |
| Keyword(2) | Adder with Multiplexer |
| Keyword(3) | Scaling |
| Keyword(4) | Saturation Adder |
| 1st Author's Name | Ichilawa Katsuhiro |
| 1st Author's Affiliation | Ritsumeikan University(Ritsumeikan Univ.) |
| 2nd Author's Name | Shigeru Yamashita |
| 2nd Author's Affiliation | Ritsumeikan University(Ritsumeikan Univ.) |
| Date | 2021-12-01 |
| Paper # | VLD2021-27,ICD2021-37,DC2021-33,RECONF2021-35 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-277,ICD-278,DC-279,RECONF-280 |
| Page | pp.pp.60-65(VLD), pp.60-65(ICD), pp.60-65(DC), pp.60-65(RECONF), |
| #Pages | 6 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |