| Presentation | 2021-12-01 Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops Aika Kamei, Takuya Kojima, Hideharu Amano, Daiki Yokoyama, Hisato Miyauchi, Kimiyoshi Usami, Keizo Hiraga, Kenta Suzuki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | IoT and edge-computing have been attracting much attention and demands for power efficiency as well as high performance for battery-driven devices has been increasing. Many IoT applications requires edge-devices to operate intermittently at a high frequent manner yet exhausting leakage power even on standby period. Newly proposed non-volatile cool mega array with multi-context (NVCMA/MC) ? one of low-power oriented coarse-grained reconfigurable accelerators ? has a non-volatile flip-flop (NVFF) with magnetic tunnel junction (MTJ) and supports power gating (PG) to reduce leakage power efficiently. NVCMA/MC is an extended version of the conventional NVCMA and facilitates the optimization of the trade-off between power and performance by enlarging the processing element (PE) array and inserting pipeline registers between each row of the PE. Newly added multi-context memories which perform task-level reconfiguration can take advantage of NVFF by efficient runtime PG. Evaluation of real chips implemented with 40nm MTJ/MOS hybrid process technology demonstrates that 65% of store energy is reduced by dividing store operation into two steps ? 35 ns of short store and 140 ns of long store. With multi-context power gating, we also found that applications that run intermittently for intervals as short as around 3μs can benefit from the PG effect. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CGRA / coarse-grained reconfigurable architecture / nonvolatile memory / magnetic tunnel junction / power gating |
| Paper # | VLD2021-20,ICD2021-30,DC2021-26,RECONF2021-28 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2021/12/1(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2021 -New Field of VLSI Design- |
| Chair | Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Hiroshi Takahashi(Ehime Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Yuichi Nakamura(NEC) |
| Vice Chair | Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo) |
| Secretary | Minako Ikeda(Osaka Univ.) / Tatsuhiro Tsuchiya(NEC) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Tokyo Inst. of Tech.) |
| Assistant | / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Kosuke Miyaji(Shinshu Univ.) / Yoshiaki Yoshihara(キオクシア) / Takeshi Kuboki(Kyushu Univ.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops |
| Sub Title (in English) | |
| Keyword(1) | CGRA |
| Keyword(2) | coarse-grained reconfigurable architecture |
| Keyword(3) | nonvolatile memory |
| Keyword(4) | magnetic tunnel junction |
| Keyword(5) | power gating |
| 1st Author's Name | Aika Kamei |
| 1st Author's Affiliation | Keio University(Keio Univ.) |
| 2nd Author's Name | Takuya Kojima |
| 2nd Author's Affiliation | Keio University(Keio Univ.) |
| 3rd Author's Name | Hideharu Amano |
| 3rd Author's Affiliation | Keio University(Keio Univ.) |
| 4th Author's Name | Daiki Yokoyama |
| 4th Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 5th Author's Name | Hisato Miyauchi |
| 5th Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 6th Author's Name | Kimiyoshi Usami |
| 6th Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 7th Author's Name | Keizo Hiraga |
| 7th Author's Affiliation | Sony Semiconductor Solutions(SSS) |
| 8th Author's Name | Kenta Suzuki |
| 8th Author's Affiliation | Sony Semiconductor Solutions(SSS) |
| Date | 2021-12-01 |
| Paper # | VLD2021-20,ICD2021-30,DC2021-26,RECONF2021-28 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-277,ICD-278,DC-279,RECONF-280 |
| Page | pp.pp.19-24(VLD), pp.19-24(ICD), pp.19-24(DC), pp.19-24(RECONF), |
| #Pages | 6 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |