| Presentation | 2021-12-01 MTJ-based non-volatile SRAM circuit with data-aware store control for energy saving Hisato Miyauchi, Kimiyoshi Usami, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, the increase of leakage power in LSIs has become a problem, and one of the methods to reduce the leakage power is Non-Volatile Power Gating (NVPG) using Magnetic Tunnel Junction (MTJ) devices. In NVPG, volatile storage circuits such as SRAM are made non-volatile by MTJ, thereby solving the problem of data retention by PG. However, MTJ has a problem of high write energy. In this study, we proposed an SRAM with low energy consumption by equipping it with a function that skips writing to MTJ if the value is the same as the currently written value (DAS: Data Aware Store), and conducted simulation evaluation in a 65nm process. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SRAM / Power-Gating / MTJ |
| Paper # | VLD2021-19,ICD2021-29,DC2021-25,RECONF2021-27 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |
| Conference Information | |
| Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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| Conference Date | 2021/12/1(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2021 -New Field of VLSI Design- |
| Chair | Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Hiroshi Takahashi(Ehime Univ.) / Kentaro Sano(RIKEN) / Masafumi Takahashi(Kioxia) / Yuichi Nakamura(NEC) |
| Vice Chair | Minako Ikeda(NTT) / Tatsuhiro Tsuchiya(Osaka Univ.) / Yoshiki Yamaguchi(Tsukuba Univ.) / Tomonori Izumi(Ritsumeikan Univ.) / Makoto Ikeda(Univ. of Tokyo) |
| Secretary | Minako Ikeda(Osaka Univ.) / Tatsuhiro Tsuchiya(NEC) / Yoshiki Yamaguchi(Nihon Univ.) / Tomonori Izumi(Chiba Univ.) / Makoto Ikeda(NEC) / (Tokyo Inst. of Tech.) |
| Assistant | / / Yukitaka Takemura(INTEL) / Yasunori Osana(Ryukyu Univ.) / Kosuke Miyaji(Shinshu Univ.) / Yoshiaki Yoshihara(キオクシア) / Takeshi Kuboki(Kyushu Univ.) |
| Paper Information | |
| Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | MTJ-based non-volatile SRAM circuit with data-aware store control for energy saving |
| Sub Title (in English) | |
| Keyword(1) | SRAM |
| Keyword(2) | Power-Gating |
| Keyword(3) | MTJ |
| 1st Author's Name | Hisato Miyauchi |
| 1st Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 2nd Author's Name | Kimiyoshi Usami |
| 2nd Author's Affiliation | Shibaura Institute of Technology(SIT) |
| Date | 2021-12-01 |
| Paper # | VLD2021-19,ICD2021-29,DC2021-25,RECONF2021-27 |
| Volume (vol) | vol.121 |
| Number (no) | VLD-277,ICD-278,DC-279,RECONF-280 |
| Page | pp.pp.13-18(VLD), pp.13-18(ICD), pp.13-18(DC), pp.13-18(RECONF), |
| #Pages | 6 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |