| Presentation | 2021-10-14 Implementation and evaluation of a FM synthesis circuit using HDLRuby Aito Fukunaga, Gauthier Lovic, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | |
| Paper # | CAS2021-29,NLP2021-27 |
| Date of Issue | 2021-10-07 (CAS, NLP) |
| Conference Information | |
| Committee | CAS / NLP |
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| Conference Date | 2021/10/14(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Hiroki Sato(Sony LSI Design) / Takuji Kosaka(Chukyo Univ.) |
| Vice Chair | Yoshinobu Maeda(Niigata Univ.) / Akio Tsuneda(Kumamoto Univ.) |
| Secretary | Yoshinobu Maeda(Sony LSI Design) / Akio Tsuneda(NIT, Toyama college) |
| Assistant | Motoi Yamaguchi(TECHNOPRO) / Yohei Nakamura(Hitachi) / Takahide Sato(Univ. of Yamanashi) / Yasutoshi Aibara(Murata Manufacturing) / Hideyuki Kato(Oita Univ.) / Yuichi Yokoi(Nagasaki Univ.) |
| Paper Information | |
| Registration To | Technical Committee on Circuits and Systems / Technical Committee on Nonlinear Problems |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and evaluation of a FM synthesis circuit using HDLRuby |
| Sub Title (in English) | |
| Keyword(1) | |
| 1st Author's Name | Aito Fukunaga |
| 1st Author's Affiliation | National Institute of Technology, Ariake College.(NITAC) |
| 2nd Author's Name | Gauthier Lovic |
| 2nd Author's Affiliation | National Institute of Technology, Ariake College.(NITAC) |
| Date | 2021-10-14 |
| Paper # | CAS2021-29,NLP2021-27 |
| Volume (vol) | vol.121 |
| Number (no) | CAS-196,NLP-197 |
| Page | pp.pp.68-73(CAS), pp.68-73(NLP), |
| #Pages | 6 |
| Date of Issue | 2021-10-07 (CAS, NLP) |