Presentation 2021-07-21
Lossy Error Correction Coding for Vector-Matrix Multiplication
Leo Otani, Haruhiko Kaneko,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Error control codes are effective to improve the reliability and precision of the vector-matrix multiplications executed on unreliable low-precision hardware. Since numerical errors of small magnitude may not affect the reliability or performance of system significantly in some applications, such as neural networks and image processings, this report presents error control codes which can efficiently correct large magnitude errors while allowing small magnitude errors. The proposed coding modifies the systematic encoding of nonbinary polar code, that is, we improve the code rate by diverting some check symbols to information symbols, while allowing small magnitude errors in the information symbols. Simulation results show that the proposed coding has higher random error correction capability compared to existing method.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) ReRAM crossbar array / vector-matrix multiplication / polar code / successive cancellation decoding
Paper # CPSY2021-7,DC2021-7
Date of Issue 2021-07-13 (CPSY, DC)

Conference Information
Committee CPSY / DC / IPSJ-ARC
Conference Date 2021/7/20(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Online
Topics (in Japanese) (See Japanese page)
Topics (in English) SWoPP2021: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
Chair Michihiro Koibuchi(NII) / Hiroshi Takahashi(Ehime Univ.) / Hiroshi Inoue(Kyushu Univ.)
Vice Chair Kota Nakajima(Fujitsu Lab.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Tatsuhiro Tsuchiya(Osaka Univ.)
Secretary Kota Nakajima(JAIST) / Tomoaki Tsumura(Hitachi) / Tatsuhiro Tsuchiya(Nihon Univ.) / (Chiba Univ.)
Assistant Ryohei Kobayashi(Tsukuba Univ.) / Takaaki Miyajima(Meiji Univ.)

Paper Information
Registration To Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Lossy Error Correction Coding for Vector-Matrix Multiplication
Sub Title (in English)
Keyword(1) ReRAM crossbar array
Keyword(2) vector-matrix multiplication
Keyword(3) polar code
Keyword(4) successive cancellation decoding
1st Author's Name Leo Otani
1st Author's Affiliation Tokyo Institute of Technology(Tokyo Tech)
2nd Author's Name Haruhiko Kaneko
2nd Author's Affiliation Tokyo Institute of Technology(Tokyo Tech)
Date 2021-07-21
Paper # CPSY2021-7,DC2021-7
Volume (vol) vol.121
Number (no) CPSY-116,DC-117
Page pp.pp.37-42(CPSY), pp.37-42(DC),
#Pages 6
Date of Issue 2021-07-13 (CPSY, DC)