Presentation 2021-04-12
Performance Evaluation of an FPGA-Based Pairing Computation Accelerator
Junichi Sakamoto, Naoki Yoshida, Tsutomu Matsumoto,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Several hardware-based accelerators have been proposed to speed up or reduce the power consumption of computationally expensive pairing calculations. In most previous studies, only the performance of the pairing-calculation circuit was evaluated. However, in practical use, the performance, including the interface part, is required. We added a PCIe interface to the fastest FPGA implementation of the pairing calculation and evaluated its performance, including the interface. The results show that the FPGA implementation of the pairing calculation is superior to the fastest software implementation in terms of computation time (62.5%) and energy consumption (49%), even after taking into account the overhead of API processing and communication interfaces.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) pairing / BN254 / PCIe
Paper # HWS2021-3
Date of Issue 2021-04-05 (HWS)

Conference Information
Committee HWS
Conference Date 2021/4/12(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Tokyo University/Online
Topics (in Japanese) (See Japanese page)
Topics (in English) Hardware Security
Chair Makoto Ikeda(Univ. of Tokyo)
Vice Chair Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.)
Secretary Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT)
Assistant

Paper Information
Registration To Technical Committee on Hardware Security
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Performance Evaluation of an FPGA-Based Pairing Computation Accelerator
Sub Title (in English)
Keyword(1) pairing
Keyword(2) BN254
Keyword(3) PCIe
1st Author's Name Junichi Sakamoto
1st Author's Affiliation Yokohama National University(YNU)
2nd Author's Name Naoki Yoshida
2nd Author's Affiliation Yokohama National University(YNU)
3rd Author's Name Tsutomu Matsumoto
3rd Author's Affiliation Yokohama National University(YNU)
Date 2021-04-12
Paper # HWS2021-3
Volume (vol) vol.121
Number (no) HWS-1
Page pp.pp.13-18(HWS),
#Pages 6
Date of Issue 2021-04-05 (HWS)