Presentation 2021-04-12
Design and Evaluation of High Speed Hardware of Isogeny-based Cryptography Using Residue Number System
Rei Ueno, Naofumi Homma,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # HWS2021-1
Date of Issue 2021-04-05 (HWS)

Conference Information
Committee HWS
Conference Date 2021/4/12(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Tokyo University/Online
Topics (in Japanese) (See Japanese page)
Topics (in English) Hardware Security
Chair Makoto Ikeda(Univ. of Tokyo)
Vice Chair Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.)
Secretary Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT)
Assistant

Paper Information
Registration To Technical Committee on Hardware Security
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design and Evaluation of High Speed Hardware of Isogeny-based Cryptography Using Residue Number System
Sub Title (in English)
Keyword(1)
1st Author's Name Rei Ueno
1st Author's Affiliation Tohoku University(Tohoku Univ.)
2nd Author's Name Naofumi Homma
2nd Author's Affiliation Tohoku University(Tohoku Univ.)
Date 2021-04-12
Paper # HWS2021-1
Volume (vol) vol.121
Number (no) HWS-1
Page pp.pp.1-6(HWS),
#Pages 6
Date of Issue 2021-04-05 (HWS)