Presentation	2021-03-04 A Fundamental Study on Three-Dimensional Module Placement for Layered Three-Dimensional LSI Tomohiro Noguchi, Hindawi Omran, Mineo Kaneko,
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Abstract(in Japanese)	(See Japanese page)
Abstract(in English)
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)
Paper #	VLD2020-81,HWS2020-56
Date of Issue	2021-02-24 (VLD, HWS)

Conference Information
Committee	HWS / VLD
Conference Date	2021/3/3(2days)
Place (in Japanese)	(See Japanese page)
Place (in English)	Online
Topics (in Japanese)	(See Japanese page)
Topics (in English)	Design Technology for System-on-Silicon, Hardware Security, etc.
Chair	Makoto Ikeda(Univ. of Tokyo) / Daisuke Fukuda(Fujitsu Labs.)
Vice Chair	Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.)
Secretary	Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT) / Kazutoshi Kobayashi(Hitachi)
Assistant	/ Takuma Nishimoto(Hitachi)

Paper Information
Registration To	Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	A Fundamental Study on Three-Dimensional Module Placement for Layered Three-Dimensional LSI
Sub Title (in English)
Keyword(1)
1st Author's Name	Tomohiro Noguchi
1st Author's Affiliation	Japan Advanced Institute of Science and Technology(JAIST)
2nd Author's Name	Hindawi Omran
2nd Author's Affiliation	Japan Advanced Institute of Science and Technology(JAIST)
3rd Author's Name	Mineo Kaneko
3rd Author's Affiliation	Japan Advanced Institute of Science and Technology(JAIST)
Date	2021-03-04
Paper #	VLD2020-81,HWS2020-56
Volume (vol)	vol.120
Number (no)	VLD-400,HWS-401
Page	pp.pp.73-78(VLD), pp.73-78(HWS),
#Pages	6
Date of Issue	2021-02-24 (VLD, HWS)