| Presentation | 2021-03-04 Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips Yuya Takahashi, Takuya Matsumaru, Kazuki Monta, Toshihiro Sato, Takaaki Okidono, Takuji Miki, Noriyuki Miura, Makoto Nagata, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Practicality of IoT systems requires the efficiency and speed of crypto processing in edge nodes and remote servers. So far software implementation is often present for wide-area system realization, however, the validity of hardware or hybrid implementation is not much pursued. In our previous works, ECDSA chips for digital signature generation and verification have been developed in a 130 nm CMOS technology. This paper reports the evaluation results of pseudo IoT networks adopting those ECDSA chips in terms of data transfer, signature verification and system-level throughputs. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Elliptic Curve Digital Signature / Digital Signature / Hardware Accelerator / Signature / IoT / ASIC / FPGA |
| Paper # | VLD2020-85,HWS2020-60 |
| Date of Issue | 2021-02-24 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
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| Conference Date | 2021/3/3(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Makoto Ikeda(Univ. of Tokyo) / Daisuke Fukuda(Fujitsu Labs.) |
| Vice Chair | Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT) / Kazutoshi Kobayashi(Hitachi) |
| Assistant | / Takuma Nishimoto(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips |
| Sub Title (in English) | |
| Keyword(1) | Elliptic Curve Digital Signature |
| Keyword(2) | Digital Signature |
| Keyword(3) | Hardware Accelerator |
| Keyword(4) | Signature |
| Keyword(5) | IoT |
| Keyword(6) | ASIC |
| Keyword(7) | FPGA |
| 1st Author's Name | Yuya Takahashi |
| 1st Author's Affiliation | Kobe University(Kobe Univ.) |
| 2nd Author's Name | Takuya Matsumaru |
| 2nd Author's Affiliation | Kobe University(Kobe Univ.) |
| 3rd Author's Name | Kazuki Monta |
| 3rd Author's Affiliation | Kobe University(Kobe Univ.) |
| 4th Author's Name | Toshihiro Sato |
| 4th Author's Affiliation | ECSEC Laboratory(ECSEC Lab) |
| 5th Author's Name | Takaaki Okidono |
| 5th Author's Affiliation | ECSEC Laboratory(ECSEC Lab) |
| 6th Author's Name | Takuji Miki |
| 6th Author's Affiliation | Kobe University(Kobe Univ.) |
| 7th Author's Name | Noriyuki Miura |
| 7th Author's Affiliation | Kobe University(Kobe Univ.) |
| 8th Author's Name | Makoto Nagata |
| 8th Author's Affiliation | Kobe University(Kobe Univ.) |
| Date | 2021-03-04 |
| Paper # | VLD2020-85,HWS2020-60 |
| Volume (vol) | vol.120 |
| Number (no) | VLD-400,HWS-401 |
| Page | pp.pp.97-101(VLD), pp.97-101(HWS), |
| #Pages | 5 |
| Date of Issue | 2021-02-24 (VLD, HWS) |