| Presentation | 2021-03-03 Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems Iori Muguruma, Nagisa Ishiura, Takuya Ando, Hiroyuki Tomiyama, Hiroyuki Kanbara, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This article presents a revised architecture for full-hardwareimplementation of RTOS-based systems. In the previous method byOosako, where tasks and handlers along with kernel functions were allsynthesized into a single hardware, multiple copies of the samehardware modules were generated because the bodies of the same servicefunctions were linked with tasks and were synthesized into hardware. Our new architecture attempts to remove such duplication by migratingthe bodies of the service functions from task modules to the managermodule. For this purpose, a new mechanism for activating servicefunctions from tasks and arbitrating multiple requests is proposed. This scheme enables design of service modules in RT level, whichcontributes to reduce execution time of the service functions. Anexperimental hardware design of ``sample1'' bundled with TOPPERS/ASP3kernel shows that only small reduction in circuit size is achieved onthis instance but the execution time is reduced by more than 50 % formost of the service functions. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Real-Time Systems / RTOS / System Synthesis / Hardware Accelerator / TOPPERS/ASP3 / High-Level Synthesis |
| Paper # | VLD2020-75,HWS2020-50 |
| Date of Issue | 2021-02-24 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
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| Conference Date | 2021/3/3(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Makoto Ikeda(Univ. of Tokyo) / Daisuke Fukuda(Fujitsu Labs.) |
| Vice Chair | Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT) / Kazutoshi Kobayashi(Hitachi) |
| Assistant | / Takuma Nishimoto(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems |
| Sub Title (in English) | |
| Keyword(1) | Real-Time Systems |
| Keyword(2) | RTOS |
| Keyword(3) | System Synthesis |
| Keyword(4) | Hardware Accelerator |
| Keyword(5) | TOPPERS/ASP3 |
| Keyword(6) | High-Level Synthesis |
| 1st Author's Name | Iori Muguruma |
| 1st Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 2nd Author's Name | Nagisa Ishiura |
| 2nd Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 3rd Author's Name | Takuya Ando |
| 3rd Author's Affiliation | Kwansei Gakuin University(Kwansei Gakuin Univ.) |
| 4th Author's Name | Hiroyuki Tomiyama |
| 4th Author's Affiliation | Ritsumeikan University(Ritsumeikan Univ.) |
| 5th Author's Name | Hiroyuki Kanbara |
| 5th Author's Affiliation | Advanced Science, Technology & Management Research Institute of KYOTO(ASTEM RI/KYOTO) |
| Date | 2021-03-03 |
| Paper # | VLD2020-75,HWS2020-50 |
| Volume (vol) | vol.120 |
| Number (no) | VLD-400,HWS-401 |
| Page | pp.pp.38-43(VLD), pp.38-43(HWS), |
| #Pages | 6 |
| Date of Issue | 2021-02-24 (VLD, HWS) |