| Presentation | 2021-03-03 A performance and resources estimation of AI Inference circuit on FPGAs Ryo Yamamoto, Iwagawa Hidetoshi, Yoshihiro Ogawa, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | |
| Paper # | VLD2020-69,HWS2020-44 |
| Date of Issue | 2021-02-24 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
|---|---|
| Conference Date | 2021/3/3(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Makoto Ikeda(Univ. of Tokyo) / Daisuke Fukuda(Fujitsu Labs.) |
| Vice Chair | Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT) / Kazutoshi Kobayashi(Hitachi) |
| Assistant | / Takuma Nishimoto(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A performance and resources estimation of AI Inference circuit on FPGAs |
| Sub Title (in English) | |
| Keyword(1) | |
| 1st Author's Name | Ryo Yamamoto |
| 1st Author's Affiliation | Mitsubishi Electric(MELCO) |
| 2nd Author's Name | Iwagawa Hidetoshi |
| 2nd Author's Affiliation | Mitsubishi Electric(MELCO) |
| 3rd Author's Name | Yoshihiro Ogawa |
| 3rd Author's Affiliation | Mitsubishi Electric(MELCO) |
| Date | 2021-03-03 |
| Paper # | VLD2020-69,HWS2020-44 |
| Volume (vol) | vol.120 |
| Number (no) | VLD-400,HWS-401 |
| Page | pp.pp.13-17(VLD), pp.13-17(HWS), |
| #Pages | 5 |
| Date of Issue | 2021-02-24 (VLD, HWS) |