| Presentation | 2021-03-04 Design space exploration on low energy embedded multi-core processors Sayuri Onagi, Yuko Hara, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Nowadays, edge computing has been sought by increasing stream data and demand for real time processing so that distributed computing can be enabled in real time on IoT edge devices that are placed on the user side. For architecture design towards edge computing, small circuit area, energy-saving, and design productivity are major concerns. This paper aims to develop design productivity of designing energy-efficient multicore processors that consist in tiny CPU cores of One Instruction Set Computers (OISCs). By building a performance and power estimation model in the early design stage, our work enables efficient design space exploration to determine the appropriate multicore structure for target applications. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | IoT / Multicore processor / Design space exploration |
| Paper # | VLD2020-79,HWS2020-54 |
| Date of Issue | 2021-02-24 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
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| Conference Date | 2021/3/3(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Makoto Ikeda(Univ. of Tokyo) / Daisuke Fukuda(Fujitsu Labs.) |
| Vice Chair | Yasuhisa Shimazaki(Renesas Electronics) / Makoto Nagata(Kobe Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Yasuhisa Shimazaki(Kyushu Univ.) / Makoto Nagata(NTT) / Kazutoshi Kobayashi(Hitachi) |
| Assistant | / Takuma Nishimoto(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design space exploration on low energy embedded multi-core processors |
| Sub Title (in English) | |
| Keyword(1) | IoT |
| Keyword(2) | Multicore processor |
| Keyword(3) | Design space exploration |
| 1st Author's Name | Sayuri Onagi |
| 1st Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
| 2nd Author's Name | Yuko Hara |
| 2nd Author's Affiliation | Tokyo Institute of Technology(Tokyo Tech) |
| Date | 2021-03-04 |
| Paper # | VLD2020-79,HWS2020-54 |
| Volume (vol) | vol.120 |
| Number (no) | VLD-400,HWS-401 |
| Page | pp.pp.61-66(VLD), pp.61-66(HWS), |
| #Pages | 6 |
| Date of Issue | 2021-02-24 (VLD, HWS) |