Presentation 2021-02-05
[Invited Talk] Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) Technology with 3D Redundancy Scheme
Shinji Sugatani, Norio Chujo, Koji Sakui, Hiroyuki Ryoson, Tomoji Nakamura, Takayuki Ohba,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) An application of vertically replaceable memory block architecturescheme hereinafter referred to as “3D redundancy” for BBCube ispresented. BBCube is a high parallelism stacked dynamic random accessmemory (DRAM) system. Productivity of better than current known gooddie (KGD) stacking process will be shown, which leads to conclude thatwafer level fabrication is possible. Superior energy efficiency and heatconductance to the conventional high bandwidth memory (HBM) structurewill be shown, which has been resulted from lower TSV impedance andheat resistance by ultra-thinning technique of silicon, and bumplessfeature, combined with higher parallelism by denser through silicon vias(TSVs) of WOW technology and BBCube.
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Keyword(in English)
Paper # SDM2020-61
Date of Issue 2021-01-29 (SDM)

Conference Information
Committee SDM
Conference Date 2021/2/5(1days)
Place (in Japanese) (See Japanese page)
Place (in English) Online
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair Hiroshige Hirano(TowerPartners Semiconductor)
Vice Chair Shunichiro Ohmi(Tokyo Inst. of Tech.)
Secretary Shunichiro Ohmi(AIST)
Assistant Taiji Noda(Panasonic) / Tomoyuki Suwa(Tohoku Univ.)

Paper Information
Registration To Technical Committee on Silicon Device and Materials
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) [Invited Talk] Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) Technology with 3D Redundancy Scheme
Sub Title (in English)
Keyword(1)
Keyword(2)
Keyword(3)
Keyword(4)
1st Author's Name Shinji Sugatani
1st Author's Affiliation Tokyo Institute of Technology(Titech)
2nd Author's Name Norio Chujo
2nd Author's Affiliation Tokyo Institute of Technology(Titech)
3rd Author's Name Koji Sakui
3rd Author's Affiliation Tokyo Institute of Technology(Titech)
4th Author's Name Hiroyuki Ryoson
4th Author's Affiliation Tokyo Institute of Technology(Titech)
5th Author's Name Tomoji Nakamura
5th Author's Affiliation Tokyo Institute of Technology(Titech)
6th Author's Name Takayuki Ohba
6th Author's Affiliation Tokyo Institute of Technology(Titech)
Date 2021-02-05
Paper # SDM2020-61
Volume (vol) vol.120
Number (no) SDM-359
Page pp.pp.27-32(SDM),
#Pages 6
Date of Issue 2021-01-29 (SDM)