| Presentation | 2021-01-26 Automated architecture exploration on Scala-based hardware development environment Ryota Yamashita, Daichi Teruya, Hironori Nakajo, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, reconfigurable architectures such as FPGAs have been attracting more and more attention. Design Space Exploration (DSE) in HLS tools is effective in improving the quality of the final circuit, but due to the huge search space, optimization algorithms have not been sufficiently compared and investigated to date. In this study, we investigate the effectiveness of Optuna, an hyperparameter optimization framework, whose effectiveness in DSE for HLS design has not yet been fully investigated. However, existing DSE frameworks have a tight coupling between the compilation flow and the optimization function. For this problem, we propose a Scala-based DSL and DSE framework that separates the algorithm specification from the hardware optimization setting. In the future, we will implement and evaluate the framework to identify effective optimization algorithms for the DSE. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | domain-specific language / high-level synthesis / design space exploration / FPGA / Scala |
| Paper # | VLD2020-62,CPSY2020-45,RECONF2020-81 |
| Date of Issue | 2021-01-18 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | CPSY / RECONF / VLD / IPSJ-ARC / IPSJ-SLDM |
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| Conference Date | 2021/1/25(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Hidetsugu Irie(Univ. of Tokyo) / Yuichiro Shibata(Nagasaki Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Inoue(Kyushu Univ.) / Yuichi Nakamura(NEC) |
| Vice Chair | Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Michihiro Koibuchi(Hokkaido Univ.) / Kota Nakajima(Nagoya Inst. of Tech.) / Kentaro Sano(e-trees.Japan) / Yoshiki Yamaguchi(NEC) / Kazutoshi Kobayashi(Hitachi) / (Osaka Univ.) / (Fujitsu lab.) |
| Assistant | Shugo Ogawa(Hitachi) / Eiji Arima(Univ. of Tokyo) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yukitaka Takemura(INTEL) / Takuma Nishimoto(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Special Interest Group on System Architecture / Special Interest Group on System and LSI Design Methodology |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Automated architecture exploration on Scala-based hardware development environment |
| Sub Title (in English) | |
| Keyword(1) | domain-specific language |
| Keyword(2) | high-level synthesis |
| Keyword(3) | design space exploration |
| Keyword(4) | FPGA |
| Keyword(5) | Scala |
| 1st Author's Name | Ryota Yamashita |
| 1st Author's Affiliation | Tokyo University of Agriculture and Technology(TUAT) |
| 2nd Author's Name | Daichi Teruya |
| 2nd Author's Affiliation | Tokyo University of Agriculture and Technology(TUAT) |
| 3rd Author's Name | Hironori Nakajo |
| 3rd Author's Affiliation | Tokyo University of Agriculture and Technology(TUAT) |
| Date | 2021-01-26 |
| Paper # | VLD2020-62,CPSY2020-45,RECONF2020-81 |
| Volume (vol) | vol.120 |
| Number (no) | VLD-337,CPSY-338,RECONF-339 |
| Page | pp.pp.131-136(VLD), pp.131-136(CPSY), pp.131-136(RECONF), |
| #Pages | 6 |
| Date of Issue | 2021-01-18 (VLD, CPSY, RECONF) |