| Presentation | 2021-01-25 Residual signed-digit number - residual binary number conversion algorithm Yuki Saba, Yuuki Tanaka, Shugang Wei, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | By applying SD(Signed-Digit) number representation, redundant residue number representation including negative number can be used and high-speed residue arithmetic operation is realized. However, since ordinary modulo operations don't handle negative numbers, it is necessary to convert the residue SD numbers that have become negative numbers to positive numbers in order to treat them as modulo binary numbers. In this paper, we propose algorithms to convert the number with SD number representation to the residue binary numbers on moduli $2^n,2^n-1$ and $2^n+1$. We have designed the conversion circuits with VHDL by using a $0.18{rm mu m}$ CMOS gate array technology library. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SD(Signed-Digit) number / residue SD number / residue binary number |
| Paper # | VLD2020-51,CPSY2020-34,RECONF2020-70 |
| Date of Issue | 2021-01-18 (VLD, CPSY, RECONF) |
| Conference Information | |
| Committee | CPSY / RECONF / VLD / IPSJ-ARC / IPSJ-SLDM |
|---|---|
| Conference Date | 2021/1/25(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Chair | Hidetsugu Irie(Univ. of Tokyo) / Yuichiro Shibata(Nagasaki Univ.) / Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Inoue(Kyushu Univ.) / Yuichi Nakamura(NEC) |
| Vice Chair | Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Michihiro Koibuchi(Hokkaido Univ.) / Kota Nakajima(Nagoya Inst. of Tech.) / Kentaro Sano(e-trees.Japan) / Yoshiki Yamaguchi(NEC) / Kazutoshi Kobayashi(Hitachi) / (Osaka Univ.) / (Fujitsu lab.) |
| Assistant | Shugo Ogawa(Hitachi) / Eiji Arima(Univ. of Tokyo) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yukitaka Takemura(INTEL) / Takuma Nishimoto(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on VLSI Design Technologies / Special Interest Group on System Architecture / Special Interest Group on System and LSI Design Methodology |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Residual signed-digit number - residual binary number conversion algorithm |
| Sub Title (in English) | |
| Keyword(1) | SD(Signed-Digit) number |
| Keyword(2) | residue SD number |
| Keyword(3) | residue binary number |
| 1st Author's Name | Yuki Saba |
| 1st Author's Affiliation | Gunma University(Gunma Univ.) |
| 2nd Author's Name | Yuuki Tanaka |
| 2nd Author's Affiliation | Gunma University(Gunma Univ.) |
| 3rd Author's Name | Shugang Wei |
| 3rd Author's Affiliation | Gunma University(Gunma Univ.) |
| Date | 2021-01-25 |
| Paper # | VLD2020-51,CPSY2020-34,RECONF2020-70 |
| Volume (vol) | vol.120 |
| Number (no) | VLD-337,CPSY-338,RECONF-339 |
| Page | pp.pp.69-74(VLD), pp.69-74(CPSY), pp.69-74(RECONF), |
| #Pages | 6 |
| Date of Issue | 2021-01-18 (VLD, CPSY, RECONF) |