Presentation | 2020-11-17 Implementation of YOLO in the AI accelerator ReNA Toma Uemura, Yasuhiro Nakahara, Motoki Amagasaki, Masato Kiyama, Masahiro Iida, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | The object detection,which is a typical AI process,has been attracting attention in various fields because it can identify objects in images and videos with high accuracy.In this paper,we propose an AI chip that can implement various DNN models including YOLO v3,which is a typical object detection model,by improving ReNA,which has been developed in our laboratory.We developed a tool to simulate the processing speed and power consumption of the chip,and evaluated it using the simulator. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Deep Learning / Convolutional Neural Network / AI Chip / AI Edge Computing |
Paper # | VLD2020-22,ICD2020-42,DC2020-42,RECONF2020-41 |
Date of Issue | 2020-11-10 (VLD, ICD, DC, RECONF) |
Conference Information | |
Committee | VLD / DC / RECONF / ICD / IPSJ-SLDM |
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Conference Date | 2020/11/17(2days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | Online |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | Design Gaia 2020 -New Field of VLSI Design- |
Chair | Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Takahashi(Ehime Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Makoto Nagata(Kobe Univ.) / Yuichi Nakamura(NEC) |
Vice Chair | Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Masafumi Takahashi(masafumi2.takahashi@kioxia.com) |
Secretary | Kazutoshi Kobayashi(Hitachi) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(Nihon Univ.) / Yoshiki Yamaguchi(Chiba Univ.) / Masafumi Takahashi(e-trees.Japan) / (NEC) |
Assistant | Takuma Nishimoto(Hitachi) / / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yukitaka Takemura(INTEL) / Koji Nii(TSMC) / Kosuke Miyaji(Shinshu Univ.) / Takeshi Kuboki(Kyushu Univ.) |
Paper Information | |
Registration To | Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Implementation of YOLO in the AI accelerator ReNA |
Sub Title (in English) | |
Keyword(1) | Deep Learning |
Keyword(2) | Convolutional Neural Network |
Keyword(3) | AI Chip |
Keyword(4) | AI Edge Computing |
1st Author's Name | Toma Uemura |
1st Author's Affiliation | Graduate School of Science and Technology, Kumamoto University(Kumamoto Univ.) |
2nd Author's Name | Yasuhiro Nakahara |
2nd Author's Affiliation | Graduate School of Science and Technology, Kumamoto University(Kumamoto Univ.) |
3rd Author's Name | Motoki Amagasaki |
3rd Author's Affiliation | Faculty of Advanced Science and Technology, Kumamoto University(Kumamoto Univ.) |
4th Author's Name | Masato Kiyama |
4th Author's Affiliation | Faculty of Advanced Science and Technology, Kumamoto University(Kumamoto Univ.) |
5th Author's Name | Masahiro Iida |
5th Author's Affiliation | Faculty of Advanced Science and Technology, Kumamoto University(Kumamoto Univ.) |
Date | 2020-11-17 |
Paper # | VLD2020-22,ICD2020-42,DC2020-42,RECONF2020-41 |
Volume (vol) | vol.120 |
Number (no) | VLD-234,ICD-235,DC-236,RECONF-237 |
Page | pp.pp.66-71(VLD), pp.66-71(ICD), pp.66-71(DC), pp.66-71(RECONF), |
#Pages | 6 |
Date of Issue | 2020-11-10 (VLD, ICD, DC, RECONF) |