Presentation 2020-11-17
DET Flip-Flops with SEU Detection Capability Using DICE and C-Element
Xu Haijia, Kazuteru Namba,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Abstract A dual-edge-triggered flip-flop (DET-FF) composed of DICE latch (Dual Interlocked Storage Cell) and C-element for SEU detection has been proposed in this article. The DICE latch has the ability to tolerate SNUs. This design can tolerate most of the SNU that may occur in DET-FF. In addition, this article also presents a circuit design that can detect soft-errors having not been detected by DET-FF. The proposed DET-FF reduces power consumption, while the DICE unit can always guarantee the characteristics of two stable nodes, so that the proposed circuit design can tolerate and detect soft-errors which occur in the circuit while reducing power consumption. The design has been simulated with CMOS circuit, and the results show that the DET-FF is tolerant to soft-errors and can detect SEU (Single Event Upset) events which affect the output results
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Soft error / DICE / Dual-edge-triggered ?FF / Radiation tolerant latch / Low power
Paper # VLD2020-14,ICD2020-34,DC2020-34,RECONF2020-33
Date of Issue 2020-11-10 (VLD, ICD, DC, RECONF)

Conference Information
Committee VLD / DC / RECONF / ICD / IPSJ-SLDM
Conference Date 2020/11/17(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Online
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2020 -New Field of VLSI Design-
Chair Daisuke Fukuda(Fujitsu Labs.) / Hiroshi Takahashi(Ehime Univ.) / Yuichiro Shibata(Nagasaki Univ.) / Makoto Nagata(Kobe Univ.) / Yuichi Nakamura(NEC)
Vice Chair Kazutoshi Kobayashi(Kyoto Inst. of Tech.) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(RIKEN) / Yoshiki Yamaguchi(Tsukuba Univ.) / Masafumi Takahashi(masafumi2.takahashi@kioxia.com)
Secretary Kazutoshi Kobayashi(Hitachi) / Tatsuhiro Tsuchiya(Osaka Univ.) / Kentaro Sano(Nihon Univ.) / Yoshiki Yamaguchi(Chiba Univ.) / Masafumi Takahashi(e-trees.Japan) / (NEC)
Assistant Takuma Nishimoto(Hitachi) / / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yukitaka Takemura(INTEL) / Koji Nii(TSMC) / Kosuke Miyaji(Shinshu Univ.) / Takeshi Kuboki(Kyushu Univ.)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Reconfigurable Systems / Technical Committee on Integrated Circuits and Devices / Special Interest Group on System and LSI Design Methodology
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) DET Flip-Flops with SEU Detection Capability Using DICE and C-Element
Sub Title (in English)
Keyword(1) Soft error
Keyword(2) DICE
Keyword(3) Dual-edge-triggered ?FF
Keyword(4) Radiation tolerant latch
Keyword(5) Low power
1st Author's Name Xu Haijia
1st Author's Affiliation Chiba University(Chiba Univ.)
2nd Author's Name Kazuteru Namba
2nd Author's Affiliation Chiba University(Chiba Univ.)
Date 2020-11-17
Paper # VLD2020-14,ICD2020-34,DC2020-34,RECONF2020-33
Volume (vol) vol.120
Number (no) VLD-234,ICD-235,DC-236,RECONF-237
Page pp.pp.18-23(VLD), pp.18-23(ICD), pp.18-23(DC), pp.18-23(RECONF),
#Pages 6
Date of Issue 2020-11-10 (VLD, ICD, DC, RECONF)