| Presentation | 2020-07-31 An Area Reduction Oriented Controller Augmentation Method Based on Functionally Equivalent Finite State Machine Generation Atsuya Tsujikawa, Toshinori Hosokawa, Masayoshi Yoshimura, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent year, controller augmentation has been used for design-for-testability and design-for-security at register transfer level. Controllers can be modeled by finite state machines. Controller augmentation increases the number of states and the number of state transitions so that the bit width of the state register and the number of inputs increase. Therefore , as the bit width of the state register and the number of inputs increase, the area overhead increases. In this paper, we propose an area reduction oriented controller augmentation method based on functionally equivalent finite state machine generation. Furthermore, we propose a logic synthesis method based on the characteristics of the augmented controllers. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | controller augmentation / resister transfer level / security design / logic synthesis / functionally equivalent finite state machine |
| Paper # | CPSY2020-15,DC2020-15 |
| Date of Issue | 2020-07-23 (CPSY, DC) |
| Conference Information | |
| Committee | CPSY / DC / IPSJ-ARC |
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| Conference Date | 2020/7/30(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | SWoPP2020: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing |
| Chair | Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Takahashi(Ehime Univ.) / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Tatsuhiro Tsuchiya(Osaka Univ.) |
| Secretary | Michihiro Koibuchi(Hokkaido Univ.) / Kota Nakajima(Nagoya Inst. of Tech.) / Tatsuhiro Tsuchiya(Nihon Univ.) / (Chiba Univ.) |
| Assistant | Shugo Ogawa(Hitachi) / Eiji Arima(Univ. of Tokyo) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Area Reduction Oriented Controller Augmentation Method Based on Functionally Equivalent Finite State Machine Generation |
| Sub Title (in English) | |
| Keyword(1) | controller augmentation |
| Keyword(2) | resister transfer level |
| Keyword(3) | security design |
| Keyword(4) | logic synthesis |
| Keyword(5) | functionally equivalent finite state machine |
| 1st Author's Name | Atsuya Tsujikawa |
| 1st Author's Affiliation | Nihon University(Nihon Univ.) |
| 2nd Author's Name | Toshinori Hosokawa |
| 2nd Author's Affiliation | Nihon University(Nihon Univ.) |
| 3rd Author's Name | Masayoshi Yoshimura |
| 3rd Author's Affiliation | Kyoto Sangyo University(Kyoto Sangyo Univ.) |
| Date | 2020-07-31 |
| Paper # | CPSY2020-15,DC2020-15 |
| Volume (vol) | vol.120 |
| Number (no) | CPSY-121,DC-122 |
| Page | pp.pp.93-98(CPSY), pp.93-98(DC), |
| #Pages | 6 |
| Date of Issue | 2020-07-23 (CPSY, DC) |