Presentation 2020-07-31
A Case for Acceleration of 2D Graph-Based SLAM using FPGA
Keisuke Sugiura, Hiroki Matsutani,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # CPSY2020-8,DC2020-8
Date of Issue 2020-07-23 (CPSY, DC)

Conference Information
Committee CPSY / DC / IPSJ-ARC
Conference Date 2020/7/30(2days)
Place (in Japanese) (See Japanese page)
Place (in English) Online
Topics (in Japanese) (See Japanese page)
Topics (in English) SWoPP2020: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing
Chair Hidetsugu Irie(Univ. of Tokyo) / Hiroshi Takahashi(Ehime Univ.) / Hiroshi Inoue(Kyushu Univ.)
Vice Chair Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Tatsuhiro Tsuchiya(Osaka Univ.)
Secretary Michihiro Koibuchi(Hokkaido Univ.) / Kota Nakajima(Nagoya Inst. of Tech.) / Tatsuhiro Tsuchiya(Nihon Univ.) / (Chiba Univ.)
Assistant Shugo Ogawa(Hitachi) / Eiji Arima(Univ. of Tokyo)

Paper Information
Registration To Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Case for Acceleration of 2D Graph-Based SLAM using FPGA
Sub Title (in English)
Keyword(1)
Keyword(2)
1st Author's Name Keisuke Sugiura
1st Author's Affiliation Keio University(Keio Univ.)
2nd Author's Name Hiroki Matsutani
2nd Author's Affiliation Keio University(Keio Univ.)
Date 2020-07-31
Paper # CPSY2020-8,DC2020-8
Volume (vol) vol.120
Number (no) CPSY-121,DC-122
Page pp.pp.49-54(CPSY), pp.49-54(DC),
#Pages 6
Date of Issue 2020-07-23 (CPSY, DC)