| Presentation | 2020-06-18 Optimal Design for Level-Shifter-Less Approach using Channel Length Modulation & Body Biasing Tatsuya Watanabe, Usami Kimiyoshi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A multi-VDD design realizes LSIs to be low power by allowing to use multiple different power supply voltages. In this design, conversion of the voltage amplitude of the signal is necessary. This is usually done by inserting a circuit called a level shifter, between voltage domains as an interface. However, insertion of level shifter has disadvantages in silicon footprint, power consumption, and delays. In this paper, we propose a level-shifter-less approach by increasing channel length. We also propose the optimal design using both channel length modulation and body biasing. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Level-Shifter-Less / Body Biasing / Channel Length Modulation |
| Paper # | CAS2020-8,VLD2020-8,SIP2020-24,MSS2020-8 |
| Date of Issue | 2020-06-11 (CAS, VLD, SIP, MSS) |
| Conference Information | |
| Committee | MSS / CAS / SIP / VLD |
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| Conference Date | 2020/6/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online Meetig |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | Shigemasa Takai(Osaka Univ.) / Yasuhiro Takashima(Univ. of Kitakyushu) / Naoyuki Aikawa(TUS) / Daisuke Fukuda(Fujitsu Labs.) |
| Vice Chair | Atsuo Ozaki(Osaka Inst. of Tech.) / Hiroki Sato(Sony LSI Design) / Kazunori Hayashi(Osaka City Univ) / Yukihiro Bandou(NTT) / Kazutoshi Kobayashi(Kyoto Inst. of Tech.) |
| Secretary | Atsuo Ozaki(Setsunan Univ.) / Hiroki Sato(Hokkaido Univ.) / Kazunori Hayashi(Yamanashi Univ.) / Yukihiro Bandou(Sony LSI Design) / Kazutoshi Kobayashi(Hiroshima Univ.) |
| Assistant | Naoki Hayashi(Osaka Univ.) / Motoi Yamaguchi(TECHNOPRO) / Yohei Nakamura(Hitachi) / Kenjiro Sugimoto(Waseda Univ.) / Kazuki Ikeda(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Mathematical Systems Science and its applications / Technical Committee on Circuits and Systems / Technical Committee on Signal Processing / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Optimal Design for Level-Shifter-Less Approach using Channel Length Modulation & Body Biasing |
| Sub Title (in English) | |
| Keyword(1) | Level-Shifter-Less |
| Keyword(2) | Body Biasing |
| Keyword(3) | Channel Length Modulation |
| 1st Author's Name | Tatsuya Watanabe |
| 1st Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 2nd Author's Name | Usami Kimiyoshi |
| 2nd Author's Affiliation | Shibaura Institute of Technology(SIT) |
| Date | 2020-06-18 |
| Paper # | CAS2020-8,VLD2020-8,SIP2020-24,MSS2020-8 |
| Volume (vol) | vol.120 |
| Number (no) | CAS-65,VLD-66,SIP-67,MSS-68 |
| Page | pp.pp.41-46(CAS), pp.41-46(VLD), pp.41-46(SIP), pp.41-46(MSS), |
| #Pages | 6 |
| Date of Issue | 2020-06-11 (CAS, VLD, SIP, MSS) |