Presentation 2020-03-04
Thermal-Aware Clock Skew Scheduling Based on Two-Graph Approach
Mineo Kaneko,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English)
Keyword(in Japanese) (See Japanese page)
Keyword(in English)
Paper # VLD2019-104,HWS2019-77
Date of Issue 2020-02-26 (VLD, HWS)

Conference Information
Committee HWS / VLD
Conference Date 2020/3/4(4days)
Place (in Japanese) (See Japanese page)
Place (in English) Okinawa Ken Seinen Kaikan
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc.
Chair Shinichi Kawamura(Toshiba) / Nozomu Togawa(Waseda Univ.)
Vice Chair Makoto Ikeda(Univ. of Tokyo) / Yasuhisa Shimazaki(Renesas Electronics) / Daisuke Fukuda(Fujitsu Labs.)
Secretary Makoto Ikeda(SECOM) / Yasuhisa Shimazaki(Kyushu Univ.) / Daisuke Fukuda(Univ. of Aizu)
Assistant / Kazuki Ikeda(Hitachi)

Paper Information
Registration To Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Thermal-Aware Clock Skew Scheduling Based on Two-Graph Approach
Sub Title (in English)
Keyword(1)
1st Author's Name Mineo Kaneko
1st Author's Affiliation Japan Advanced Institute of Science and Technology(JAIST)
Date 2020-03-04
Paper # VLD2019-104,HWS2019-77
Volume (vol) vol.119
Number (no) VLD-443,HWS-444
Page pp.pp.59-64(VLD), pp.59-64(HWS),
#Pages 6
Date of Issue 2020-02-26 (VLD, HWS)