| Presentation | 2020-03-06 Circuit Architecture Exploration for Optical Neural Network based on Integrated Nanophotonics Naoki Hattori, Yutaka Masuda, Tohru Ishihara, Jun Shiomi, Akihiko Shinya, Masaya Notomi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With a rapid progress of the integrated nanophotonics technology, optical neural networksbased on the integrated nanophotonics attract significant attention. This paper presents an optical neural network architecture which can perform inference processing at a speed of light. The architecture fully exploits optical parallelism of lights using wavelength divisionmultiplexing (WDM) in vector-matrix multiplication. The paper also presents a light-speed activation circuit based on nanophotonic O-E-O converter. Finally, using an intrusion detection system as an application, the paper explores appropriate circuit structures which can fully exploit ultra-low latency nature and optical parallelism of lights without degrading the inference accuracy. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Optical Neural Network / Wavelength Division Multiplexing / Intrusion Detection System |
| Paper # | VLD2019-137,HWS2019-110 |
| Date of Issue | 2020-02-26 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
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| Conference Date | 2020/3/4(4days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Ken Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Shinichi Kawamura(Toshiba) / Nozomu Togawa(Waseda Univ.) |
| Vice Chair | Makoto Ikeda(Univ. of Tokyo) / Yasuhisa Shimazaki(Renesas Electronics) / Daisuke Fukuda(Fujitsu Labs.) |
| Secretary | Makoto Ikeda(SECOM) / Yasuhisa Shimazaki(Kyushu Univ.) / Daisuke Fukuda(Univ. of Aizu) |
| Assistant | / Kazuki Ikeda(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Circuit Architecture Exploration for Optical Neural Network based on Integrated Nanophotonics |
| Sub Title (in English) | |
| Keyword(1) | Optical Neural Network |
| Keyword(2) | Wavelength Division Multiplexing |
| Keyword(3) | Intrusion Detection System |
| 1st Author's Name | Naoki Hattori |
| 1st Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 2nd Author's Name | Yutaka Masuda |
| 2nd Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 3rd Author's Name | Tohru Ishihara |
| 3rd Author's Affiliation | Nagoya University(Nagoya Univ.) |
| 4th Author's Name | Jun Shiomi |
| 4th Author's Affiliation | Kyoto University(Kyoto Univ.) |
| 5th Author's Name | Akihiko Shinya |
| 5th Author's Affiliation | NTT Nanophotonics Center(NTT) |
| 6th Author's Name | Masaya Notomi |
| 6th Author's Affiliation | NTT Basic Research Center(NTT) |
| Date | 2020-03-06 |
| Paper # | VLD2019-137,HWS2019-110 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-443,HWS-444 |
| Page | pp.pp.251-256(VLD), pp.251-256(HWS), |
| #Pages | 6 |
| Date of Issue | 2020-02-26 (VLD, HWS) |