| Presentation | 2020-03-04 MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation Sosuke Akiba, Kimiyoshi Usami, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | One of the leakage reduction techniques is nonvolatile power gating(NVPG) by using magnetic tunnel junction(MTJ). In the NVPG, volatile circuits such as a flip-flop are made nonvolatile by applying the MTJ, so solving the problem of losing data due to power off of the PG. However, when the power supply voltage for nonvolatile flip-flop (NVFF) is lowered gradually, writing to MTJ and reading from MTJ (nonvolatile operation) do not work properly. Although we have to choose the power supply voltage of NVFF within the limit of working nonvolatile operation properly, we want to make logic circuits including the FF operate at a low voltage for power consumption. In this paper, in order to enable normal operation in NVFF at lower voltage, we propose NVFF circuit using two power supplies. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Power-Gating / MTJ / Flip-Flop |
| Paper # | VLD2019-99,HWS2019-72 |
| Date of Issue | 2020-02-26 (VLD, HWS) |
| Conference Information | |
| Committee | HWS / VLD |
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| Conference Date | 2020/3/4(4days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Ken Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Chair | Shinichi Kawamura(Toshiba) / Nozomu Togawa(Waseda Univ.) |
| Vice Chair | Makoto Ikeda(Univ. of Tokyo) / Yasuhisa Shimazaki(Renesas Electronics) / Daisuke Fukuda(Fujitsu Labs.) |
| Secretary | Makoto Ikeda(SECOM) / Yasuhisa Shimazaki(Kyushu Univ.) / Daisuke Fukuda(Univ. of Aizu) |
| Assistant | / Kazuki Ikeda(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Hardware Security / Technical Committee on VLSI Design Technologies |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation |
| Sub Title (in English) | |
| Keyword(1) | Power-Gating |
| Keyword(2) | MTJ |
| Keyword(3) | Flip-Flop |
| 1st Author's Name | Sosuke Akiba |
| 1st Author's Affiliation | Shibaura Institute of Technology(SIT) |
| 2nd Author's Name | Kimiyoshi Usami |
| 2nd Author's Affiliation | Shibaura Institute of Technology(SIT) |
| Date | 2020-03-04 |
| Paper # | VLD2019-99,HWS2019-72 |
| Volume (vol) | vol.119 |
| Number (no) | VLD-443,HWS-444 |
| Page | pp.pp.31-36(VLD), pp.31-36(HWS), |
| #Pages | 6 |
| Date of Issue | 2020-02-26 (VLD, HWS) |