| Presentation | 2020-02-27 HLS by multi-objective optimization under resource constraints Fukuhei Hamazaki, Tetsuro Yamazaki, Ryota Shioya, Kenichi Koizumi, Hiroshi Tezuka, Mary Inaba, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | For engineers who are not familiar with circuits, it is difficult to optimize circuit considering trade-off factors such as latency, hardware resources, and power consumption. In this research, we proposed a new HLS system, which utilizes coarse-grained parallelism. It extracts parallel code blocks and determines parallelism of each block by solving multi-objective optimization problems. We implemented under the condition that there is no branch in the data flow graph. We conducted experiments to synthesize an optimal circuit under device constraints. As a result, we confirmed that the optimal device and circuit differed depending on how much emphasis was placed on time and power consumption. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | high-level synthesis / resource-constraint / function language / coarse-grained parallel / multi-objective optimization / skyline |
| Paper # | CPSY2019-104,DC2019-110 |
| Date of Issue | 2020-02-20 (CPSY, DC) |
| Conference Information | |
| Committee | CPSY / DC / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC |
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| Conference Date | 2020/2/27(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Yoron-cho Chuou-Kouminkan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | ETNET 2020 |
| Chair | Hidetsugu Irie(Univ. of Tokyo) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Yutaka Tamiya(Fujitsu Lab.) / / Hiroshi Inoue(Kyushu Univ.) |
| Vice Chair | Michihiro Koibuchi(NII) / Kota Nakajima(Fujitsu Lab.) / Hiroshi Takahashi(Ehime Univ.) |
| Secretary | Michihiro Koibuchi(Nagoya Inst. of Tech.) / Kota Nakajima(Univ. of Tokyo) / Hiroshi Takahashi(Nihon Univ.) / (Chiba Univ.) / (Univ. Shiga Prefecture) / (NTT) |
| Assistant | Eiji Arima(Univ. of Tokyo) / Shugo Ogawa(Hitachi) |
| Paper Information | |
| Registration To | Technical Committee on Computer Systems / Technical Committee on Dependable Computing / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | HLS by multi-objective optimization under resource constraints |
| Sub Title (in English) | Approach to extracting coarse-grained parallelism using functional language |
| Keyword(1) | high-level synthesis |
| Keyword(2) | resource-constraint |
| Keyword(3) | function language |
| Keyword(4) | coarse-grained parallel |
| Keyword(5) | multi-objective optimization |
| Keyword(6) | skyline |
| 1st Author's Name | Fukuhei Hamazaki |
| 1st Author's Affiliation | Tokyo University(U-Tokyo) |
| 2nd Author's Name | Tetsuro Yamazaki |
| 2nd Author's Affiliation | Tokyo University(U-Tokyo) |
| 3rd Author's Name | Ryota Shioya |
| 3rd Author's Affiliation | Tokyo University(U-Tokyo) |
| 4th Author's Name | Kenichi Koizumi |
| 4th Author's Affiliation | *(*) |
| 5th Author's Name | Hiroshi Tezuka |
| 5th Author's Affiliation | *(*) |
| 6th Author's Name | Mary Inaba |
| 6th Author's Affiliation | Tokyo University(U-Tokyo) |
| Date | 2020-02-27 |
| Paper # | CPSY2019-104,DC2019-110 |
| Volume (vol) | vol.119 |
| Number (no) | CPSY-428,DC-429 |
| Page | pp.pp.99-104(CPSY), pp.99-104(DC), |
| #Pages | 6 |
| Date of Issue | 2020-02-20 (CPSY, DC) |